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Add x86 legalization for sshr.i64x2

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This commit is contained in:
Andrew Brown
2020-05-02 15:20:04 -07:00
parent 4155d15e69
commit cd49ed9582
3 changed files with 46 additions and 2 deletions
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14
cranelift/filetests/filetests/isa/x86/simd-bitwise-legalize.clif
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@@ -84,6 +84,20 @@ block0:
return v2
}
function %sshr_i64x2() -> i64x2 {
block0:
v0 = iconst.i32 1
v1 = vconst.i64x2 [1 2]
v2 = sshr v1, v0
; check: v3 = x86_pextr v1, 0
; nextln: v4 = sshr v3, v0
; nextln: v5 = x86_pinsr v1, 0, v4
; nextln: v6 = x86_pextr v1, 1
; nextln: v7 = sshr v6, v0
; nextln: v2 = x86_pinsr v5, 1, v7
return v2
}
function %bitselect_i16x8() -> i16x8 {
block0:
v0 = vconst.i16x8 [0 0 0 0 0 0 0 0]

10
cranelift/filetests/filetests/isa/x86/simd-bitwise-run.clif
View File

@@ -145,6 +145,16 @@ block0:
}
; run
function %sshr_i64x2(i64x2, i32) -> i64x2 {
block0(v0:i64x2, v1:i32):
v2 = sshr v0, v1
return v2
}
; run: %sshr_i64x2([1 -1], 0) == [1 -1]
; run: %sshr_i64x2([1 -1], 1) == [0 -1] ; note the -1 shift result
; run: %sshr_i64x2([2 -2], 1) == [1 -1]
; run: %sshr_i64x2([0x80000000_00000000 0x7FFFFFFF_FFFFFFFF], 63) == [0xFFFFFFFF_FFFFFFFF 0]
function %bitselect_i8x16() -> b1 {
block0:
v0 = vconst.i8x16 [0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 255] ; the selector vector