Put BaldrMonkey-specific behavior under a setting.

BaldrMonkey will need to enable allones_funcaddrs.

lib/cretonne/meta/base/settings.py

@@ -69,5 +69,13 @@ spiderwasm_prologue_words = NumSetting(
         pushed return address on Intel ISAs.
         """)
 
+#
+# BaldrMonkey requires that not-yet-relocated function addresses be encoded
+# as all-ones bitpatterns.
+#
+allones_funcaddrs = BoolSetting(
+        """
+        Emit not-yet-relocated function addresses as all-ones bit patterns.
+        """)
 
 group.close(globals())

lib/cretonne/meta/isa/intel/encodings.py

@@ -2,7 +2,7 @@
 Intel Encodings.
 """
 from __future__ import absolute_import
-from cdsl.predicates import IsUnsignedInt
+from cdsl.predicates import IsUnsignedInt, Not
 from base import instructions as base
 from base.formats import UnaryImm
 from .defs import I32, I64
@@ -11,6 +11,7 @@ from . import settings as cfg
 from . import instructions as x86
 from .legalize import intel_expand
 from base.legalize import narrow, expand
+from base.settings import allones_funcaddrs
 from .settings import use_sse41
 
 try:
@@ -260,8 +261,15 @@ enc_both(base.regspill.f64, r.frsp32, 0x66, 0x0f, 0xd6)
 # Function addresses.
 #
 
-I32.enc(base.func_addr.i32, *r.fnaddr4(0xb8))
-I64.enc(base.func_addr.i64, *r.fnaddr8.rex(0xb8, w=1))
+I32.enc(base.func_addr.i32, *r.fnaddr4(0xb8),
+        isap=Not(allones_funcaddrs))
+I64.enc(base.func_addr.i64, *r.fnaddr8.rex(0xb8, w=1),
+        isap=Not(allones_funcaddrs))
+
+I32.enc(base.func_addr.i32, *r.allones_fnaddr4(0xb8),
+        isap=allones_funcaddrs)
+I64.enc(base.func_addr.i64, *r.allones_fnaddr8.rex(0xb8, w=1),
+        isap=allones_funcaddrs)
 
 #
 # Call/return

lib/cretonne/meta/isa/intel/recipes.py

@@ -478,8 +478,7 @@ fnaddr4 = TailRecipe(
         emit='''
         PUT_OP(bits | (out_reg0 & 7), rex1(out_reg0), sink);
         sink.reloc_func(RelocKind::Abs4.into(), func_ref);
-        // Write the immediate as `!0` for the benefit of BaldrMonkey.
-        sink.put4(!0);
+        sink.put4(0);
         ''')
 
 # XX+rd iq with Abs8 function relocation.
@@ -488,6 +487,25 @@ fnaddr8 = TailRecipe(
         emit='''
         PUT_OP(bits | (out_reg0 & 7), rex1(out_reg0), sink);
         sink.reloc_func(RelocKind::Abs8.into(), func_ref);
+        sink.put8(0);
+        ''')
+
+# Similar to fnaddr4, but writes !0 (this is used by BaldrMonkey).
+allones_fnaddr4 = TailRecipe(
+        'allones_fnaddr4', FuncAddr, size=4, ins=(), outs=GPR,
+        emit='''
+        PUT_OP(bits | (out_reg0 & 7), rex1(out_reg0), sink);
+        sink.reloc_func(RelocKind::Abs4.into(), func_ref);
+        // Write the immediate as `!0` for the benefit of BaldrMonkey.
+        sink.put4(!0);
+        ''')
+
+# Similar to fnaddr8, but writes !0 (this is used by BaldrMonkey).
+allones_fnaddr8 = TailRecipe(
+        'allones_fnaddr8', FuncAddr, size=8, ins=(), outs=GPR,
+        emit='''
+        PUT_OP(bits | (out_reg0 & 7), rex1(out_reg0), sink);
+        sink.reloc_func(RelocKind::Abs8.into(), func_ref);
         // Write the immediate as `!0` for the benefit of BaldrMonkey.
         sink.put8(!0);
         ''')

lib/cretonne/src/settings.rs

@@ -352,7 +352,8 @@ mod tests {
                     enable_float = true\n\
                     enable_simd = true\n\
                     enable_atomics = true\n\
-                    spiderwasm_prologue_words = 0\n"
+                    spiderwasm_prologue_words = 0\n\
+                    allones_funcaddrs = false\n"
         );
         assert_eq!(f.opt_level(), super::OptLevel::Default);
         assert_eq!(f.enable_simd(), true);