Switch default to new x86_64 backend.

This PR switches the default backend on x86, for both the
`cranelift-codegen` crate and for Wasmtime, to the new
(`MachInst`-style, `VCode`-based) backend that has been under
development and testing for some time now.

The old backend is still available by default in builds with the
`old-x86-backend` feature, or by requesting `BackendVariant::Legacy`
from the appropriate APIs.

As part of that switch, it adds some more runtime-configurable plumbing
to the testing infrastructure so that tests can be run using the
appropriate backend. `clif-util test` is now capable of parsing a
backend selector option from filetests and instantiating the correct
backend.

CI has been updated so that the old x86 backend continues to run its
tests, just as we used to run the new x64 backend separately.

At some point, we will remove the old x86 backend entirely, once we are
satisfied that the new backend has not caused any unforeseen issues and
we do not need to revert.

cranelift/filetests/filetests/isa/x64/amode-opt.clif

@@ -1,6 +1,5 @@
 test compile
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %amode_add(i64, i64) -> i64 {
 block0(v0: i64, v1: i64):

cranelift/filetests/filetests/isa/x64/b1.clif

@@ -1,6 +1,5 @@
 test compile
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %f0(b1, i32, i32) -> i32 {
 ; check:  pushq   %rbp

cranelift/filetests/filetests/isa/x64/basic.clif

@@ -1,6 +1,5 @@
 test compile
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %f(i32, i32) -> i32 {
 block0(v0: i32, v1: i32):

cranelift/filetests/filetests/isa/x64/bitops-i128-run.clif

@@ -1,6 +1,5 @@
 test run
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %ctz(i64, i64) -> i8 {
 block0(v0: i64, v1: i64):

cranelift/filetests/filetests/isa/x64/bitrev-i128-run.clif

@@ -1,6 +1,5 @@
 test run
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %reverse_bits_zero() -> b1 {
 block0:

cranelift/filetests/filetests/isa/x64/branches.clif

@@ -1,6 +1,5 @@
 test compile
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %f0(i32, i32) -> i32 {
 block0(v0: i32, v1: i32):

cranelift/filetests/filetests/isa/x64/clz-lzcnt.clif

@@ -1,6 +1,5 @@
 test compile
-target x86_64 has_lzcnt
-feature "experimental_x64"
+target x86_64 machinst has_lzcnt
 
 function %clz(i64) -> i64 {
 block0(v0: i64):

cranelift/filetests/filetests/isa/x64/cmp-mem-bug.clif

@@ -1,6 +1,5 @@
 test compile
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %f0(i64, i64) -> i64, i64 {
 block0(v0: i64, v1: i64):

cranelift/filetests/filetests/isa/x64/ctz-bmi1.clif

@@ -1,6 +1,5 @@
 test compile
-target x86_64 has_bmi1
-feature "experimental_x64"
+target x86_64 machinst has_bmi1
 
 function %ctz(i64) -> i64 {
 block0(v0: i64):

cranelift/filetests/filetests/isa/x64/div-checks-run.clif

@@ -1,7 +1,6 @@
 test run
 set avoid_div_traps=false
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %f0(i32, i32) -> i32 {
 block0(v0: i32, v1: i32):

cranelift/filetests/filetests/isa/x64/div-checks.clif

@@ -1,7 +1,6 @@
 test compile
 set avoid_div_traps=false
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 ;; We should get the checked-div/rem sequence (`srem` pseudoinst below) even
 ;; when `avoid_div_traps` above is false (i.e. even when the host is normally

cranelift/filetests/filetests/isa/x64/fastcall.clif

@@ -1,8 +1,7 @@
 test compile
 set enable_llvm_abi_extensions=true
 set unwind_info=true
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %f0(i64, i64, i64, i64) -> i64 windows_fastcall {
 block0(v0: i64, v1: i64, v2: i64, v3: i64):

cranelift/filetests/filetests/isa/x64/floating-point.clif

@@ -1,6 +1,5 @@
 test compile
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %f(f64) -> f64 {
 block0(v0: f64):

cranelift/filetests/filetests/isa/x64/heap.clif

@@ -1,6 +1,5 @@
 test compile
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %f(i32, i64 vmctx) -> i64 {
     gv0 = vmctx

cranelift/filetests/filetests/isa/x64/i128.clif

@@ -1,7 +1,6 @@
 test compile
 set enable_llvm_abi_extensions=true
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %f0(i128, i128) -> i128 {
 ; check:   pushq   %rbp

cranelift/filetests/filetests/isa/x64/icmp-i128-run.clif

@@ -1,6 +1,5 @@
 test run
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %test_icmp_eq_i128() -> b1 {
 block0:

cranelift/filetests/filetests/isa/x64/load-op.clif

@@ -1,6 +1,5 @@
 test compile
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %add_from_mem_u32_1(i64, i32) -> i32 {
 block0(v0: i64, v1: i32):

cranelift/filetests/filetests/isa/x64/move-elision.clif

@@ -1,7 +1,6 @@
 test compile
 set enable_simd
-target x86_64 skylake
-feature "experimental_x64"
+target x86_64 machinst skylake
 
 function %move_registers(i32x4) -> b8x16 {
 block0(v0: i32x4):

cranelift/filetests/filetests/isa/x64/popcnt-use-popcnt.clif

@@ -1,6 +1,5 @@
 test compile
-target x86_64 has_popcnt has_sse42
-feature "experimental_x64"
+target x86_64 machinst has_popcnt has_sse42
 
 function %popcnt(i64) -> i64 {
 block0(v0: i64):

cranelift/filetests/filetests/isa/x64/popcnt.clif

@@ -1,6 +1,5 @@
 test compile
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %popcnt64(i64) -> i64 {
 block0(v0: i64):

cranelift/filetests/filetests/isa/x64/probestack.clif

@@ -1,7 +1,6 @@
 test compile
 set enable_probestack=true
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %f1() -> i64 {
 ss0 = explicit_slot 100000

cranelift/filetests/filetests/isa/x64/run-const.clif

@@ -1,6 +1,5 @@
 test run
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %test_compare_i32() -> b1 {
 block0:

cranelift/filetests/filetests/isa/x64/select-i128.clif

@@ -1,7 +1,6 @@
 test compile
 set enable_llvm_abi_extensions=true
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %f0(i32, i128, i128) -> i128 {
 ; check:   pushq   %rbp

cranelift/filetests/filetests/isa/x64/shift-i128-run.clif

@@ -1,6 +1,5 @@
 test run
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %ishl(i64, i64, i8) -> i64, i64 {
 block0(v0: i64, v1: i64, v2: i8):

cranelift/filetests/filetests/isa/x64/simd-arithmetic-run.clif

@@ -1,7 +1,6 @@
 test run
 set enable_simd
-target x86_64 skylake
-feature "experimental_x64"
+target x86_64 machinst skylake
 
 function %iadd_i32x4(i32x4, i32x4) -> i32x4 {
 block0(v0:i32x4, v1:i32x4):

cranelift/filetests/filetests/isa/x64/simd-bitwise-compile.clif

@@ -1,7 +1,6 @@
 test compile
 set enable_simd
-target x86_64 skylake
-feature "experimental_x64"
+target x86_64 machinst skylake
 
 function %bitselect_i16x8() -> i16x8 {
 block0:

cranelift/filetests/filetests/isa/x64/simd-bitwise-run.clif

@@ -1,7 +1,6 @@
 test run
 set enable_simd
-target x86_64 skylake
-feature "experimental_x64"
+target x86_64 machinst skylake
 
 function %bitselect_i8x16(i8x16, i8x16, i8x16) -> i8x16 {
 block0(v0: i8x16, v1: i8x16, v2: i8x16):

cranelift/filetests/filetests/isa/x64/simd-comparison-legalize.clif

@@ -1,7 +1,6 @@
 test compile
 set enable_simd
-target x86_64 skylake
-feature "experimental_x64"
+target x86_64 machinst skylake
 
 function %icmp_ne_32x4(i32x4, i32x4) -> b32x4 {
 block0(v0: i32x4, v1: i32x4):

cranelift/filetests/filetests/isa/x64/simd-comparison-run.clif

@@ -1,7 +1,6 @@
 test run
 set enable_simd
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %icmp_eq_i8x16() -> b8 {
 block0:

cranelift/filetests/filetests/isa/x64/simd-conversion-run.clif

@@ -1,7 +1,6 @@
 test run
 set enable_simd
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %fcvt_from_sint() -> b1 {
 block0:

cranelift/filetests/filetests/isa/x64/simd-lane-access-compile.clif

@@ -1,7 +1,6 @@
 test compile
 set enable_simd
-target x86_64 has_ssse3 has_sse41
-feature "experimental_x64"
+target x86_64 machinst has_ssse3 has_sse41
 
 ;; shuffle
 

cranelift/filetests/filetests/isa/x64/simd-lane-access-run.clif

@@ -1,7 +1,6 @@
 test run
 set enable_simd
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 ;; shuffle
 

cranelift/filetests/filetests/isa/x64/simd-logical-compile.clif

@@ -1,7 +1,6 @@
 test compile
 set enable_simd
-target x86_64 skylake
-feature "experimental_x64"
+target x86_64 machinst skylake
 
 function %bnot_b32x4(b32x4) -> b32x4 {
 block0(v0: b32x4):

cranelift/filetests/filetests/isa/x64/simd-logical-run.clif

@@ -1,7 +1,6 @@
 test run
 set enable_simd
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %bnot() -> b32 {
 block0:

cranelift/filetests/filetests/isa/x64/struct-arg.clif

@@ -1,6 +1,5 @@
 test compile
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function u0:0(i64 sarg(64)) -> i8 system_v {
 block0(v0: i64):

cranelift/filetests/filetests/isa/x64/struct-ret.clif

@@ -1,6 +1,5 @@
 test compile
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %f0(i64 sret) {
 block0(v0: i64):

cranelift/filetests/filetests/isa/x64/tls_elf.clif

@@ -1,7 +1,6 @@
 test compile
 set tls_model=elf_gd
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function u0:0(i32) -> i64 {
 gv0 = symbol colocated tls u1:0

cranelift/filetests/filetests/isa/x64/uextend-elision.clif

@@ -1,6 +1,5 @@
 test compile
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 function %elide_uextend_add(i32, i32) -> i64 {
 block0(v0: i32, v1: i32):

cranelift/filetests/filetests/isa/x64/unused_jt_unreachable_block.clif

@@ -1,6 +1,5 @@
 test compile
-target x86_64
-feature "experimental_x64"
+target x86_64 machinst
 
 ;; From: https://github.com/bytecodealliance/wasmtime/issues/2670