Interpreter: Implement floating point conversions (#4884)

* Interpreter: Implement floating point conversions

Implemented the following opcodes for the interpreter:
- `FcvtToUint`
- `FcvtToSint`
- `FcvtToUintSat`
- `FcvtToSintSat`
- `FcvtFromUint`
- `FcvtFromSint`
- `FcvtLowFromSint`
- `FvpromoteLow`
- `Fvdemote`

Copyright (c) 2022 Arm Limited

* Fix `I128` bounds checks for `FcvtTo{U,S}int{_,Sat}`

Copyright (c) 2022 Arm Limited

* Fix broken test

Copyright (c) 2022 Arm Limited

cranelift/filetests/filetests/runtests/conversion.clif

@@ -0,0 +1,55 @@
+test interpret
+test run
+target aarch64
+target s390x
+target x86_64
+
+function %fcvt_to_sint(f32) -> i32 {
+block0(v0: f32):
+    v1 = fcvt_to_sint.i32 v0
+    return v1
+}
+; run: %fcvt_to_sint(0x0.0) == 0
+; run: %fcvt_to_sint(0x1.0) == 1
+; run: %fcvt_to_sint(0x1.d6f346p26) == 123456792
+; run: %fcvt_to_sint(0x8.1) == 8
+
+function %fcvt_to_uint(f32) -> i32 {
+block0(v0:f32):
+    v1 = fcvt_to_uint.i32 v0
+    return v1
+}
+; run: %fcvt_to_uint(0x0.0) == 0
+; run: %fcvt_to_uint(0x1.0) == 1
+; run: %fcvt_to_uint(0x4.2) == 4
+; run: %fcvt_to_uint(0x4.6) == 4
+; run: %fcvt_to_uint(0x1.d6f346p26) == 123456792
+; run: %fcvt_to_uint(0xB2D05E00.0) == 3000000000
+
+function %fcvt_to_sint_sat(f32) -> i32 {
+block0(v0: f32):
+    v1 = fcvt_to_sint_sat.i32 v0
+    return v1
+}
+; run: %fcvt_to_sint_sat(0x0.0) == 0
+; run: %fcvt_to_sint_sat(0x1.0) == 1
+; run: %fcvt_to_sint_sat(0x1.d6f346p26) == 123456792
+; run: %fcvt_to_sint_sat(0x8.1) == 8
+; run: %fcvt_to_sint_sat(-0x1.0) == -1
+; run: %fcvt_to_sint_sat(0x1.fffffep127) == 2147483647
+; run: %fcvt_to_sint_sat(-0x1.fffffep127) == -2147483648
+
+function %fcvt_to_uint_sat(f32) -> i32 {
+block0(v0:f32):
+    v1 = fcvt_to_uint_sat.i32 v0
+    return v1
+}
+; run: %fcvt_to_uint_sat(0x0.0) == 0
+; run: %fcvt_to_uint_sat(0x1.0) == 1
+; run: %fcvt_to_uint_sat(0x4.2) == 4
+; run: %fcvt_to_uint_sat(0x4.6) == 4
+; run: %fcvt_to_uint_sat(0x1.d6f346p26) == 123456792
+; run: %fcvt_to_uint_sat(0xB2D05E00.0) == 3000000000
+; run: %fcvt_to_uint_sat(-0x1.0) == 0
+; run: %fcvt_to_uint_sat(0x1.fffffep127) == 4294967295
+; run: %fcvt_to_uint_sat(-0x1.fffffep127) == 0

cranelift/filetests/filetests/runtests/i128-conversion.clif

@@ -0,0 +1,52 @@
+test interpret
+; `fcvt_to_{u,s}int.i128` not currently supported by any backend.
+
+function %fcvt_to_uint_i128(f32) -> i128 {
+block0(v0: f32):
+    v1 = fcvt_to_uint.i128 v0
+    return v1
+}
+; run: %fcvt_to_uint_i128(0x0.0) == 0
+; run: %fcvt_to_uint_i128(0x1.0) == 1
+; run: %fcvt_to_uint_i128(0x1.0p31) == 2147483648
+; run: %fcvt_to_uint_i128(0x1.fffffp31) == 4294965248
+; run: %fcvt_to_uint_i128(0x1.0p63) == 9223372036854775808
+; run: %fcvt_to_uint_i128(0x1.fffffep127) == 170141183460469231731687303715884105727
+
+function %fcvt_to_sint_i128(f32) -> i128 {
+block0(v0: f32):
+    v1 = fcvt_to_sint.i128 v0
+    return v1
+}
+; run: %fcvt_to_sint_i128(0x0.0) == 0
+; run: %fcvt_to_sint_i128(0x1.0) == 1
+; run: %fcvt_to_sint_i128(0x1.0p31) == 2147483648
+; run: %fcvt_to_sint_i128(0x1.fffffp31) == 4294965248
+; run: %fcvt_to_sint_i128(-0x1.fffffp31) == -4294965248
+; run: %fcvt_to_sint_i128(0x1.0p63) == 9223372036854775808
+; run: %fcvt_to_sint_i128(-0x1.0p63) == -9223372036854775808
+; run: %fcvt_to_sint_i128(0x1.fffffep127) == 170141183460469231731687303715884105727
+
+function %fcvt_to_uint_sat_i128(f32) -> i128 {
+block0(v0: f32):
+    v1 = fcvt_to_uint_sat.i128 v0
+    return v1
+}
+; run: %fcvt_to_uint_sat_i128(0x0.0) == 0
+; run: %fcvt_to_uint_sat_i128(0x1.0) == 1
+; run: %fcvt_to_uint_sat_i128(0x1.0p31) == 2147483648
+; run: %fcvt_to_uint_sat_i128(0x1.fffffp31) == 4294965248
+; run: %fcvt_to_uint_sat_i128(-0x1.fffffp31) == 0
+; run: %fcvt_to_uint_sat_i128(0x1.fffffep127) == 170141183460469231731687303715884105727
+
+function %fcvt_to_sint_sat_i128(f32) -> i128 {
+block0(v0: f32):
+    v1 = fcvt_to_sint_sat.i128 v0
+    return v1
+}
+; run: %fcvt_to_sint_sat_i128(0x0.0) == 0
+; run: %fcvt_to_sint_sat_i128(0x1.0) == 1
+; run: %fcvt_to_sint_sat_i128(0x1.0p31) == 2147483648
+; run: %fcvt_to_sint_sat_i128(0x1.fffffp31) == 4294965248
+; run: %fcvt_to_sint_sat_i128(-0x1.fffffp31) == -4294965248
+; run: %fcvt_to_sint_sat_i128(0x1.fffffep127) == 170141183460469231731687303715884105727

cranelift/filetests/filetests/runtests/simd-conversion.clif

@@ -1,3 +1,4 @@
+test interpret
 test run
 target aarch64
 target s390x
@@ -47,3 +48,29 @@ block0(v0: i32x4):
 }
 ; run: %fcvt_low_from_sint([0 1 -1 65535]) == [0x0.0 0x1.0]
 ; run: %fcvt_low_from_sint([-1 123456789 0 1]) == [-0x1.0 0x1.d6f3454p26]
+
+function %fvdemote(f64x2) -> f32x4 {
+block0(v0: f64x2):
+    v1 = fvdemote v0
+    return v1
+}
+
+; run: %fvdemote([0x0.0 0x0.0]) == [0x0.0 0x0.0 0x0.0 0x0.0]
+; run: %fvdemote([0x0.1 0x0.2]) == [0x0.1 0x0.2 0x0.0 0x0.0]
+; run: %fvdemote([0x2.1 0x1.2]) == [0x2.1 0x1.2 0x0.0 0x0.0]
+; run: %fvdemote([0x2.1 0x1.2]) == [0x2.1 0x1.2 0x0.0 0x0.0]
+; run: %fvdemote([0x2.1 0x1.2]) == [0x2.1 0x1.2 0x0.0 0x0.0]
+
+
+function %fvpromote_low(f32x4) -> f64x2 {
+block0(v0: f32x4):
+    v1 = fvpromote_low v0
+    return v1
+}
+
+; run: %fvpromote_low([0x0.0 0x0.0 0x0.0 0x0.0]) == [0x0.0 0x0.0]
+; run: %fvpromote_low([0x0.1 0x0.2 0x0.0 0x0.0]) == [0x0.1 0x0.2]
+; run: %fvpromote_low([0x2.1 0x1.2 0x0.0 0x0.0]) == [0x2.1 0x1.2]
+; run: %fvpromote_low([0x0.0 0x0.0 0x2.1 0x1.2]) == [0x0.0 0x0.0]
+; run: %fvpromote_low([0x0.0 0x0.0 0x2.1 0x1.2]) == [0x0.0 0x0.0]
+