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Add subtract and logical instruction encodings to Intel-32.

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Also add versions with 8-bit and 32-bit immediate operands.
This commit is contained in:
Jakob Stoklund Olesen
2017-05-12 10:35:18 -07:00
parent 3aaa8b2f91
commit c998df6274
5 changed files with 117 additions and 10 deletions
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14
lib/cretonne/meta/isa/intel/recipes.py
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@@ -3,8 +3,8 @@ Intel Encoding recipes.
"""
from __future__ import absolute_import
from cdsl.isa import EncRecipe
# from cdsl.predicates import IsSignedInt
from base.formats import Binary
from cdsl.predicates import IsSignedInt
from base.formats import Binary, BinaryImm
from .registers import GPR
# Opcode representation.
@@ -68,3 +68,13 @@ Op1rr = EncRecipe('Op1rr', Binary, size=2, ins=(GPR, GPR), outs=0)
# XX /n with one arg in %rcx, for shifts.
Op1rc = EncRecipe('Op1rc', Binary, size=2, ins=(GPR, GPR.rcx), outs=0)
# XX /n ib with 8-bit immediate sign-extended.
Op1rib = EncRecipe(
'Op1rib', BinaryImm, size=3, ins=GPR, outs=0,
instp=IsSignedInt(BinaryImm.imm, 8))
# XX /n id with 32-bit immediate sign-extended.
Op1rid = EncRecipe(
'Op1rid', BinaryImm, size=6, ins=GPR, outs=0,
instp=IsSignedInt(BinaryImm.imm, 32))