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[machinst x64]: enable packed saturated arithmetic

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This commit is contained in:
Andrew Brown
2020-10-07 16:15:09 -07:00
parent 116acb8dcd
commit c8cce5d2d7
6 changed files with 72 additions and 18 deletions
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12
cranelift/codegen/src/isa/x64/inst/args.rs
View File

@@ -459,6 +459,10 @@ pub enum SseOpcode {
Psubd,
Psubq,
Psubw,
Psubsb,
Psubsw,
Psubusb,
Psubusw,
Ptest,
Pxor,
Rcpss,
@@ -582,6 +586,10 @@ impl SseOpcode {
| SseOpcode::Psubd
| SseOpcode::Psubq
| SseOpcode::Psubw
| SseOpcode::Psubsb
| SseOpcode::Psubsw
| SseOpcode::Psubusb
| SseOpcode::Psubusw
| SseOpcode::Pxor
| SseOpcode::Sqrtpd
| SseOpcode::Sqrtsd
@@ -736,6 +744,10 @@ impl fmt::Debug for SseOpcode {
SseOpcode::Psubd => "psubd",
SseOpcode::Psubq => "psubq",
SseOpcode::Psubw => "psubw",
SseOpcode::Psubsb => "psubsb",
SseOpcode::Psubsw => "psubsw",
SseOpcode::Psubusb => "psubusb",
SseOpcode::Psubusw => "psubusw",
SseOpcode::Ptest => "ptest",
SseOpcode::Pxor => "pxor",
SseOpcode::Rcpss => "rcpss",

4
cranelift/codegen/src/isa/x64/inst/emit.rs
View File

@@ -1798,6 +1798,10 @@ pub(crate) fn emit(
SseOpcode::Psubd => (LegacyPrefixes::_66, 0x0FFA, 2),
SseOpcode::Psubq => (LegacyPrefixes::_66, 0x0FFB, 2),
SseOpcode::Psubw => (LegacyPrefixes::_66, 0x0FF9, 2),
SseOpcode::Psubsb => (LegacyPrefixes::_66, 0x0FE8, 2),
SseOpcode::Psubsw => (LegacyPrefixes::_66, 0x0FE9, 2),
SseOpcode::Psubusb => (LegacyPrefixes::_66, 0x0FD8, 2),
SseOpcode::Psubusw => (LegacyPrefixes::_66, 0x0FD9, 2),
SseOpcode::Pxor => (LegacyPrefixes::_66, 0x0FEF, 2),
SseOpcode::Subps => (LegacyPrefixes::None, 0x0F5C, 2),
SseOpcode::Subpd => (LegacyPrefixes::_66, 0x0F5C, 2),

24
cranelift/codegen/src/isa/x64/inst/emit_tests.rs
View File

@@ -3128,6 +3128,30 @@ fn test_x64_emit() {
"paddusw %xmm1, %xmm8",
));
insns.push((
Inst::xmm_rm_r(SseOpcode::Psubsb, RegMem::reg(xmm9), w_xmm5),
"66410FE8E9",
"psubsb %xmm9, %xmm5",
));
insns.push((
Inst::xmm_rm_r(SseOpcode::Psubsw, RegMem::reg(xmm7), w_xmm6),
"660FE9F7",
"psubsw %xmm7, %xmm6",
));
insns.push((
Inst::xmm_rm_r(SseOpcode::Psubusb, RegMem::reg(xmm12), w_xmm13),
"66450FD8EC",
"psubusb %xmm12, %xmm13",
));
insns.push((
Inst::xmm_rm_r(SseOpcode::Psubusw, RegMem::reg(xmm1), w_xmm8),
"66440FD9C1",
"psubusw %xmm1, %xmm8",
));
insns.push((
Inst::xmm_rm_r(SseOpcode::Pavgb, RegMem::reg(xmm12), w_xmm13),
"66450FE0EC",

12
cranelift/codegen/src/isa/x64/lower.rs
View File

@@ -546,6 +546,8 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
| Opcode::SaddSat
| Opcode::UaddSat
| Opcode::Isub
| Opcode::SsubSat
| Opcode::UsubSat
| Opcode::Imul
| Opcode::AvgRound
| Opcode::Band
@@ -578,6 +580,16 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
types::I64X2 => SseOpcode::Psubq,
_ => panic!("Unsupported type for packed isub instruction: {}", ty),
},
Opcode::SsubSat => match ty {
types::I8X16 => SseOpcode::Psubsb,
types::I16X8 => SseOpcode::Psubsw,
_ => panic!("Unsupported type for packed ssub_sat instruction: {}", ty),
},
Opcode::UsubSat => match ty {
types::I8X16 => SseOpcode::Psubusb,
types::I16X8 => SseOpcode::Psubusw,
_ => panic!("Unsupported type for packed usub_sat instruction: {}", ty),
},
Opcode::Imul => match ty {
types::I16X8 => SseOpcode::Pmullw,
types::I32X4 => SseOpcode::Pmulld,