cranelift: Remove iconst.i128 (#5075)

* cranelift: Remove iconst.i128

* bugpoint: Report Changed when only one instruction is mutated

* cranelift: Fix egraph bxor rule

* cranelift: Remove some simple_preopt opts for i128

cranelift/filetests/filetests/egraph/i128-opts.clif

@@ -0,0 +1,13 @@
+test optimize
+set opt_level=speed_and_size
+set use_egraphs=true
+target x86_64
+
+; This it a regression test to ensure that we don't insert a iconst.i128 when optimizing bxor.
+function %bxor_i128(i128) -> i128 system_v {
+block0(v0: i128):
+    v1 = bxor v0, v0
+    return v1
+    ; check: v1 = bxor v0, v0
+    ; nextln: return v1
+}

cranelift/filetests/filetests/isa/aarch64/condops.clif

@@ -278,81 +278,86 @@ block0(v0: i64, v1: i128, v2: i128):
 
 function %f(i128, i8, i8) -> i8 {
 block0(v0: i128, v1: i8, v2: i8):
-  v3 = iconst.i128 42
-  v4 = ifcmp v0, v3
-  v5 = selectif.i8 eq v4, v1, v2
-  return v5
+  v3 = iconst.i64 42
+  v4 = uextend.i128 v3
+  v5 = ifcmp v0, v4
+  v6 = selectif.i8 eq v5, v1, v2
+  return v6
 }
 
 ; block0:
-;   movz x6, #42
-;   movz x8, #0
-;   subs xzr, x0, x6
-;   ccmp x1, x8, #nzcv, eq
+;   movz x7, #42
+;   movz w9, #0
+;   subs xzr, x0, x7
+;   ccmp x1, x9, #nzcv, eq
 ;   csel x0, x2, x3, eq
 ;   ret
 
 function %f(i128, i16, i16) -> i16 {
 block0(v0: i128, v1: i16, v2: i16):
-  v3 = iconst.i128 42
-  v4 = ifcmp v0, v3
-  v5 = selectif.i16 eq v4, v1, v2
-  return v5
+  v3 = iconst.i64 42
+  v4 = uextend.i128 v3
+  v5 = ifcmp v0, v4
+  v6 = selectif.i16 eq v5, v1, v2
+  return v6
 }
 
 ; block0:
-;   movz x6, #42
-;   movz x8, #0
-;   subs xzr, x0, x6
-;   ccmp x1, x8, #nzcv, eq
+;   movz x7, #42
+;   movz w9, #0
+;   subs xzr, x0, x7
+;   ccmp x1, x9, #nzcv, eq
 ;   csel x0, x2, x3, eq
 ;   ret
 
 function %f(i128, i32, i32) -> i32 {
 block0(v0: i128, v1: i32, v2: i32):
-  v3 = iconst.i128 42
-  v4 = ifcmp v0, v3
-  v5 = selectif.i32 eq v4, v1, v2
-  return v5
+  v3 = iconst.i64 42
+  v4 = uextend.i128 v3
+  v5 = ifcmp v0, v4
+  v6 = selectif.i32 eq v5, v1, v2
+  return v6
 }
 
 ; block0:
-;   movz x6, #42
-;   movz x8, #0
-;   subs xzr, x0, x6
-;   ccmp x1, x8, #nzcv, eq
+;   movz x7, #42
+;   movz w9, #0
+;   subs xzr, x0, x7
+;   ccmp x1, x9, #nzcv, eq
 ;   csel x0, x2, x3, eq
 ;   ret
 
 function %f(i128, i64, i64) -> i64 {
 block0(v0: i128, v1: i64, v2: i64):
-  v3 = iconst.i128 42
-  v4 = ifcmp v0, v3
-  v5 = selectif.i64 eq v4, v1, v2
-  return v5
+  v3 = iconst.i64 42
+  v4 = uextend.i128 v3
+  v5 = ifcmp v0, v4
+  v6 = selectif.i64 eq v5, v1, v2
+  return v6
 }
 
 ; block0:
-;   movz x6, #42
-;   movz x8, #0
-;   subs xzr, x0, x6
-;   ccmp x1, x8, #nzcv, eq
+;   movz x7, #42
+;   movz w9, #0
+;   subs xzr, x0, x7
+;   ccmp x1, x9, #nzcv, eq
 ;   csel x0, x2, x3, eq
 ;   ret
 
 function %f(i128, i128, i128) -> i128 {
 block0(v0: i128, v1: i128, v2: i128):
-  v3 = iconst.i128 42
-  v4 = ifcmp v0, v3
-  v5 = selectif.i128 eq v4, v1, v2
-  return v5
+  v3 = iconst.i64 42
+  v4 = uextend.i128 v3
+  v5 = ifcmp v0, v4
+  v6 = selectif.i128 eq v5, v1, v2
+  return v6
 }
 
 ; block0:
-;   movz x9, #42
-;   movz x11, #0
-;   subs xzr, x0, x9
-;   ccmp x1, x11, #nzcv, eq
+;   movz x11, #42
+;   movz w13, #0
+;   subs xzr, x0, x11
+;   ccmp x1, x13, #nzcv, eq
 ;   csel x0, x2, x4, eq
 ;   csel x1, x3, x5, eq
 ;   ret
@@ -653,85 +658,90 @@ block0(v0: i64, v1: i128, v2: i128):
 
 function %f(i128, i8, i8) -> i8 {
 block0(v0: i128, v1: i8, v2: i8):
-  v3 = iconst.i128 42
-  v4 = ifcmp v0, v3
-  v5 = selectif_spectre_guard.i8 eq v4, v1, v2
-  return v5
+  v3 = iconst.i64 42
+  v4 = uextend.i128 v3
+  v5 = ifcmp v0, v4
+  v6 = selectif_spectre_guard.i8 eq v5, v1, v2
+  return v6
 }
 
 ; block0:
-;   movz x6, #42
-;   movz x8, #0
-;   subs xzr, x0, x6
-;   ccmp x1, x8, #nzcv, eq
+;   movz x7, #42
+;   movz w9, #0
+;   subs xzr, x0, x7
+;   ccmp x1, x9, #nzcv, eq
 ;   csel x0, x2, x3, eq
 ;   csdb
 ;   ret
 
 function %f(i128, i16, i16) -> i16 {
 block0(v0: i128, v1: i16, v2: i16):
-  v3 = iconst.i128 42
-  v4 = ifcmp v0, v3
-  v5 = selectif_spectre_guard.i16 eq v4, v1, v2
-  return v5
+  v3 = iconst.i64 42
+  v4 = uextend.i128 v3
+  v5 = ifcmp v0, v4
+  v6 = selectif_spectre_guard.i16 eq v5, v1, v2
+  return v6
 }
 
 ; block0:
-;   movz x6, #42
-;   movz x8, #0
-;   subs xzr, x0, x6
-;   ccmp x1, x8, #nzcv, eq
+;   movz x7, #42
+;   movz w9, #0
+;   subs xzr, x0, x7
+;   ccmp x1, x9, #nzcv, eq
 ;   csel x0, x2, x3, eq
 ;   csdb
 ;   ret
 
 function %f(i128, i32, i32) -> i32 {
 block0(v0: i128, v1: i32, v2: i32):
-  v3 = iconst.i128 42
-  v4 = ifcmp v0, v3
-  v5 = selectif_spectre_guard.i32 eq v4, v1, v2
-  return v5
+  v3 = iconst.i64 42
+  v4 = uextend.i128 v3
+  v5 = ifcmp v0, v4
+  v6 = selectif_spectre_guard.i32 eq v5, v1, v2
+  return v6
 }
 
 ; block0:
-;   movz x6, #42
-;   movz x8, #0
-;   subs xzr, x0, x6
-;   ccmp x1, x8, #nzcv, eq
+;   movz x7, #42
+;   movz w9, #0
+;   subs xzr, x0, x7
+;   ccmp x1, x9, #nzcv, eq
 ;   csel x0, x2, x3, eq
 ;   csdb
 ;   ret
 
 function %f(i128, i64, i64) -> i64 {
 block0(v0: i128, v1: i64, v2: i64):
-  v3 = iconst.i128 42
-  v4 = ifcmp v0, v3
-  v5 = selectif_spectre_guard.i64 eq v4, v1, v2
-  return v5
+  v3 = iconst.i64 42
+  v4 = uextend.i128 v3
+  v5 = ifcmp v0, v4
+  v6 = selectif_spectre_guard.i64 eq v5, v1, v2
+  return v6
 }
 
 ; block0:
-;   movz x6, #42
-;   movz x8, #0
-;   subs xzr, x0, x6
-;   ccmp x1, x8, #nzcv, eq
+;   movz x7, #42
+;   movz w9, #0
+;   subs xzr, x0, x7
+;   ccmp x1, x9, #nzcv, eq
 ;   csel x0, x2, x3, eq
 ;   csdb
 ;   ret
 
 function %f(i128, i128, i128) -> i128 {
 block0(v0: i128, v1: i128, v2: i128):
-  v3 = iconst.i128 42
-  v4 = ifcmp v0, v3
-  v5 = selectif_spectre_guard.i128 eq v4, v1, v2
-  return v5
+  v3 = iconst.i64 42
+  v4 = uextend.i128 v3
+  v5 = ifcmp v0, v4
+  v6 = selectif_spectre_guard.i128 eq v5, v1, v2
+  return v6
 }
 
 ; block0:
-;   movz x9, #42
-;   movz x11, #0
-;   subs xzr, x0, x9
-;   ccmp x1, x11, #nzcv, eq
+;   movz x11, #42
+;   movz w13, #0
+;   subs xzr, x0, x11
+;   ccmp x1, x13, #nzcv, eq
 ;   csel x0, x2, x4, eq
 ;   csel x1, x3, x5, eq
 ;   csdb

cranelift/filetests/filetests/isa/x64/i128.clif

@@ -656,43 +656,46 @@ block0(v0: i64):
 
 function %f23(i128, i8) -> i128 {
 block0(v0: i128, v1: i8):
-    v2 = iconst.i128 0
-    brnz v1, block1(v2)
-    jump block2(v2)
+    v2 = iconst.i64 0
+    v3 = uextend.i128 v2
+    brnz v1, block1(v3)
+    jump block2(v3)
 
-block1(v3: i128):
-    v4 = iconst.i128 1
-    v5 = iadd.i128 v3, v4
-    return v5
+block1(v4: i128):
+    v5 = iconst.i64 1
+    v6 = uextend.i128 v5
+    v7 = iadd.i128 v4, v6
+    return v7
 
-block2(v6: i128):
-    v7 = iconst.i128 2
-    v8 = iadd.i128 v6, v7
-    return v8
+block2(v8: i128):
+    v9 = iconst.i64 2
+    v10 = uextend.i128 v9
+    v11 = iadd.i128 v8, v10
+    return v11
 }
 
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ; block0:
+;   xorq    %rax, %rax, %rax
+;   xorq    %r11, %r11, %r11
 ;   testb   %dl, %dl
 ;   jnz     label1; j label2
 ; block1:
-;   xorq    %rax, %rax, %rax
-;   xorq    %rdx, %rdx, %rdx
-;   movl    $1, %esi
-;   xorq    %rcx, %rcx, %rcx
-;   addq    %rax, %rsi, %rax
-;   adcq    %rdx, %rcx, %rdx
+;   movl    $1, %r10d
+;   xorq    %rsi, %rsi, %rsi
+;   addq    %rax, %r10, %rax
+;   movq    %r11, %rdx
+;   adcq    %rdx, %rsi, %rdx
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
 ;   ret
 ; block2:
-;   xorq    %rax, %rax, %rax
-;   xorq    %rdx, %rdx, %rdx
-;   movl    $2, %r8d
-;   xorq    %r10, %r10, %r10
-;   addq    %rax, %r8, %rax
-;   adcq    %rdx, %r10, %rdx
+;   movq    %r11, %rdx
+;   movl    $2, %ecx
+;   xorq    %r8, %r8, %r8
+;   addq    %rax, %rcx, %rax
+;   adcq    %rdx, %r8, %rdx
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
 ;   ret

cranelift/filetests/filetests/runtests/i128-const.clif

@@ -1,14 +0,0 @@
-test interpret
-test run
-set enable_llvm_abi_extensions=true
-target aarch64
-target s390x
-target x86_64
-target riscv64
-
-function %i128_const_0() -> i128 {
-block0:
-    v1 = iconst.i128 0
-    return v1
-}
-; run: %i128_const_0() == 0

cranelift/filetests/filetests/runtests/riscv64_issue_4996.clif

@@ -15,8 +15,10 @@ function %issue4996() -> i128, i64 system_v {
         jump block5(v13)
 
     block3:
-        v21 = iconst.i128 0
-        jump block5(v21)  ; v21 = 0
+        v20 = iconst.i64 0
+        v21 = uextend.i128 v20  ; v20 = 0
+        jump block5(v21)
+
     block5(v23: i128):
         v29 = iconst.i64 0
         return v23, v29  ; v29 = 0

cranelift/filetests/filetests/simple_preopt/i128.clif

@@ -0,0 +1,28 @@
+test simple_preopt
+target aarch64
+target x86_64
+target s390x
+target riscv64
+
+function %imul_imm_zero(i128) -> i128 {
+block0(v0: i128):
+    v1 = imul_imm v0, 0
+    return v1
+}
+; sameln: function %imul_imm_zero
+; nextln: block0(v0: i128):
+; nextln:     v1 = imul_imm v0, 0
+; nextln:     return v1
+; nextln: }
+
+
+function %band_imm_zero(i128) -> i128 {
+block0(v0: i128):
+    v1 = band_imm v0, 0
+    return v1
+}
+; check: function %band_imm_zero
+; nextln: block0(v0: i128):
+; nextln:     v1 = band_imm v0, 0
+; nextln:     return v1
+; nextln: }