Remove module-level code generation tests (#5870)

* Remove module-level code generation tests

* Add cold block tests for each backend

* Better cold block tests

cranelift/filetests/filetests/isa/aarch64/cold-blocks.clif

@@ -0,0 +1,71 @@
+test compile precise-output
+
+target aarch64
+
+function %no_cold_annotation(i32) -> i32 {
+block0(v0: i32):
+    brif v0, block1(v0), block2
+
+block1(v1: i32):
+    return v1
+
+block2:
+    v2 = iconst.i32 97
+    jump block1(v2)
+}
+
+; VCode:
+; block0:
+;   mov w5, w0
+;   cbnz x5, label1 ; b label2
+; block1:
+;   b label3
+; block2:
+;   movz w0, #97
+;   b label3
+; block3:
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   mov w5, w0
+;   cbnz x5, #0xc
+; block1: ; offset 0x8
+;   mov w0, #0x61
+; block2: ; offset 0xc
+;   ret
+
+function %cold_annotation(i32) -> i32 {
+block0(v0: i32):
+    brif v0, block1(v0), block2
+
+block1(v1: i32):
+    return v1
+
+block2 cold:
+    v2 = iconst.i32 97
+    jump block1(v2)
+}
+
+; VCode:
+; block0:
+;   mov w5, w0
+;   cbnz x5, label1 ; b label2
+; block1:
+;   b label3
+; block3:
+;   ret
+; block2:
+;   movz w0, #97
+;   b label3
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   mov w5, w0
+;   cbz x5, #0xc
+; block1: ; offset 0x8
+;   ret
+; block2: ; offset 0xc
+;   mov w0, #0x61
+;   b #8
+

cranelift/filetests/filetests/isa/riscv64/cold-blocks.clif

@@ -0,0 +1,71 @@
+test compile precise-output
+
+target riscv64
+
+function %no_cold_annotation(i32) -> i32 {
+block0(v0: i32):
+    brif v0, block1(v0), block2
+
+block1(v1: i32):
+    return v1
+
+block2:
+    v2 = iconst.i32 97
+    jump block1(v2)
+}
+
+; VCode:
+; block0:
+;   sext.w a2,a0
+;   bne a2,zero,taken(label1),not_taken(label2)
+; block1:
+;   j label3
+; block2:
+;   li a0,97
+;   j label3
+; block3:
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   sext.w a2, a0
+;   bnez a2, 8
+; block1: ; offset 0x8
+;   addi a0, zero, 0x61
+; block2: ; offset 0xc
+;   ret
+
+function %cold_annotation(i32) -> i32 {
+block0(v0: i32):
+    brif v0, block1(v0), block2
+
+block1(v1: i32):
+    return v1
+
+block2 cold:
+    v2 = iconst.i32 97
+    jump block1(v2)
+}
+
+; VCode:
+; block0:
+;   sext.w a2,a0
+;   bne a2,zero,taken(label1),not_taken(label2)
+; block1:
+;   j label3
+; block3:
+;   ret
+; block2:
+;   li a0,97
+;   j label3
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   sext.w a2, a0
+;   beqz a2, 8
+; block1: ; offset 0x8
+;   ret
+; block2: ; offset 0xc
+;   addi a0, zero, 0x61
+;   j -8
+

cranelift/filetests/filetests/isa/s390x/cold-blocks.clif

@@ -0,0 +1,71 @@
+test compile precise-output
+
+target s390x
+
+function %no_cold_annotation(i32) -> i32 {
+block0(v0: i32):
+    brif v0, block1(v0), block2
+
+block1(v1: i32):
+    return v1
+
+block2:
+    v2 = iconst.i32 97
+    jump block1(v2)
+}
+
+; VCode:
+; block0:
+;   chi %r2, 0
+;   jglh label1 ; jg label2
+; block1:
+;   jg label3
+; block2:
+;   lhi %r2, 97
+;   jg label3
+; block3:
+;   br %r14
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   chi %r2, 0
+;   jglh 0xe
+; block1: ; offset 0xa
+;   lhi %r2, 0x61
+; block2: ; offset 0xe
+;   br %r14
+
+function %cold_annotation(i32) -> i32 {
+block0(v0: i32):
+    brif v0, block1(v0), block2
+
+block1(v1: i32):
+    return v1
+
+block2 cold:
+    v2 = iconst.i32 97
+    jump block1(v2)
+}
+
+; VCode:
+; block0:
+;   chi %r2, 0
+;   jglh label1 ; jg label2
+; block1:
+;   jg label3
+; block3:
+;   br %r14
+; block2:
+;   lhi %r2, 97
+;   jg label3
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   chi %r2, 0
+;   jgnlh 0xc
+; block1: ; offset 0xa
+;   br %r14
+; block2: ; offset 0xc
+;   lhi %r2, 0x61
+;   jg 0xa
+

cranelift/filetests/filetests/isa/x64/cold-blocks.clif

@@ -0,0 +1,96 @@
+test compile precise-output
+
+target x86_64
+
+function %no_cold_annotation(i32) -> i32 {
+block0(v0: i32):
+    brif v0, block1(v0), block2
+
+block1(v1: i32):
+    return v1
+
+block2:
+    v2 = iconst.i32 97
+    jump block1(v2)
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   testl   %edi, %edi
+;   jnz     label1; j label2
+; block1:
+;   movq    %rdi, %rax
+;   jmp     label3
+; block2:
+;   movl    $97, %eax
+;   jmp     label3
+; block3:
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   testl %edi, %edi
+;   je 0x14
+; block2: ; offset 0xc
+;   movq %rdi, %rax
+;   jmp 0x19
+; block3: ; offset 0x14
+;   movl $0x61, %eax
+; block4: ; offset 0x19
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %cold_annotation(i32) -> i32 {
+block0(v0: i32):
+    brif v0, block1(v0), block2
+
+block1(v1: i32):
+    return v1
+
+block2 cold:
+    v2 = iconst.i32 97
+    jump block1(v2)
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   testl   %edi, %edi
+;   jnz     label1; j label2
+; block1:
+;   movq    %rdi, %rax
+;   jmp     label3
+; block3:
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; block2:
+;   movl    $97, %eax
+;   jmp     label3
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   testl %edi, %edi
+;   je 0x14
+; block2: ; offset 0xc
+;   movq %rdi, %rax
+; block3: ; offset 0xf
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+; block4: ; offset 0x14
+;   movl $0x61, %eax
+;   jmp 0xf
+