Add support for macho relocations. (#378)

This requires splitting X86PCRel4 into two separate relocations, to
distinguish the case where the instruction is a call, as Mach-O uses a
different relocation in that case.

This also makes it explicit that only x86-64 relocations are supported
currently.
This commit is contained in:
Dan Gohman
2018-06-28 10:15:10 -07:00
committed by GitHub
parent cc94adca3b
commit c5aad1eb5f
8 changed files with 70 additions and 39 deletions

View File

@@ -1388,7 +1388,7 @@ call_id = TailRecipe(
PUT_OP(bits, BASE_REX, sink);
// The addend adjusts for the difference between the end of the
// instruction and the beginning of the immediate field.
sink.reloc_external(Reloc::X86PCRel4,
sink.reloc_external(Reloc::X86CallPCRel4,
&func.dfg.ext_funcs[func_ref].name,
-4);
sink.put4(0);
@@ -1399,7 +1399,7 @@ call_plt_id = TailRecipe(
emit='''
sink.trap(TrapCode::StackOverflow, func.srclocs[inst]);
PUT_OP(bits, BASE_REX, sink);
sink.reloc_external(Reloc::X86PLTRel4,
sink.reloc_external(Reloc::X86CallPLTRel4,
&func.dfg.ext_funcs[func_ref].name,
-4);
sink.put4(0);

View File

@@ -33,10 +33,12 @@ pub enum Reloc {
Abs8,
/// x86 PC-relative 4-byte
X86PCRel4,
/// x86 call to PC-relative 4-byte
X86CallPCRel4,
/// x86 call to PLT-relative 4-byte
X86CallPLTRel4,
/// x86 GOT PC-relative 4-byte
X86GOTPCRel4,
/// x86 PLT-relative 4-byte
X86PLTRel4,
/// Arm32 call target
Arm32Call,
/// Arm64 call target
@@ -53,8 +55,9 @@ impl fmt::Display for Reloc {
Reloc::Abs4 => write!(f, "Abs4"),
Reloc::Abs8 => write!(f, "Abs8"),
Reloc::X86PCRel4 => write!(f, "PCRel4"),
Reloc::X86CallPCRel4 => write!(f, "CallPCRel4"),
Reloc::X86CallPLTRel4 => write!(f, "CallPLTRel4"),
Reloc::X86GOTPCRel4 => write!(f, "GOTPCRel4"),
Reloc::X86PLTRel4 => write!(f, "PLTRel4"),
Reloc::Arm32Call | Reloc::Arm64Call | Reloc::RiscvCall => write!(f, "Call"),
}
}