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Add support for macho relocations. (#378)

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This requires splitting X86PCRel4 into two separate relocations, to
distinguish the case where the instruction is a call, as Mach-O uses a
different relocation in that case.

This also makes it explicit that only x86-64 relocations are supported
currently.
This commit is contained in:
Dan Gohman
2018-06-28 10:15:10 -07:00
committed by GitHub
parent cc94adca3b
commit c5aad1eb5f
8 changed files with 70 additions and 39 deletions
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2
cranelift/filetests/isa/x86/binary32.cton
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@@ -352,7 +352,7 @@ ebb0:
[-,%rsi] v351 = bint.i32 v301 ; bin: 0f b6 f2
; asm: call foo
call fn0() ; bin: stk_ovf e8 PCRel4(%foo-4) 00000000
call fn0() ; bin: stk_ovf e8 CallPCRel4(%foo-4) 00000000
; asm: movl $0, %ecx
[-,%rcx] v400 = func_addr.i32 fn0 ; bin: b9 Abs4(%foo) 00000000

4
cranelift/filetests/isa/x86/binary64-pic.cton
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@@ -30,7 +30,7 @@ ebb0:
; Colocated functions.
; asm: call foo
call fn1() ; bin: stk_ovf e8 PCRel4(%bar-4) 00000000
call fn1() ; bin: stk_ovf e8 CallPCRel4(%bar-4) 00000000
; asm: lea 0x0(%rip), %rax
[-,%rax] v0 = func_addr.i64 fn1 ; bin: 48 8d 05 PCRel4(%bar-4) 00000000
@@ -49,7 +49,7 @@ ebb0:
; Non-colocated functions.
; asm: call foo@PLT
call fn0() ; bin: stk_ovf e8 PLTRel4(%foo-4) 00000000
call fn0() ; bin: stk_ovf e8 CallPLTRel4(%foo-4) 00000000
; asm: mov 0x0(%rip), %rax
[-,%rax] v100 = func_addr.i64 fn0 ; bin: 48 8b 05 GOTPCRel4(%foo-4) 00000000

2
cranelift/filetests/isa/x86/binary64.cton
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@@ -485,7 +485,7 @@ ebb0:
; Colocated functions.
; asm: call bar
call fn1() ; bin: stk_ovf e8 PCRel4(%bar-4) 00000000
call fn1() ; bin: stk_ovf e8 CallPCRel4(%bar-4) 00000000
; asm: lea 0x0(%rip), %rcx
[-,%rcx] v400 = func_addr.i64 fn1 ; bin: 48 8d 0d PCRel4(%bar-4) 00000000