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Add x86 legalization for fcvt_to_uint_sat.i32x4

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This converts an `f32x4` into an `i32x4` (unsigned) with rounding by using a long sequence of SSE4.1 compatible instructions.
This commit is contained in:
Andrew Brown
2020-06-03 12:18:02 -07:00
parent 091373f9b8
commit c5a69cee9f
5 changed files with 106 additions and 0 deletions
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20
cranelift/filetests/filetests/isa/x86/simd-conversion-legalize.clif
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@@ -32,3 +32,23 @@ block0(v0:f32x4):
; nextln: v1 = bxor v7, v9
return v1
}
function %fcvt_to_uint_sat(f32x4) -> i32x4 {
; check: const0 = 0x00000000000000000000000000000000
; nextln: const1 = 0x4f0000004f0000004f0000004f000000
block0(v0:f32x4):
v1 = fcvt_to_uint_sat.i32x4 v0
; check: v2 = vconst.f32x4 const0
; nextln: v3 = vconst.f32x4 const1
; nextln: v4 = x86_fmax v0, v2
; nextln: v5 = fsub v4, v3
; nextln: v6 = fcmp le v3, v5
; nextln: v7 = x86_cvtt2si.i32x4 v5
; nextln: v8 = raw_bitcast.i32x4 v6
; nextln: v9 = bxor v7, v8
; nextln: v10 = raw_bitcast.i32x4 v2
; nextln: v11 = x86_pmaxs v9, v10
; nextln: v12 = x86_cvtt2si.i32x4 v4
; nextln: v1 = iadd v12, v11
return v1
}

9
cranelift/filetests/filetests/isa/x86/simd-conversion-run.clif
View File

@@ -28,3 +28,12 @@ block0(v0:f32x4):
}
; run: %fcvt_to_sint_sat([0x0.0 -0x1.0 0x1.0 0x1.0p100]) == [0 -1 1 0x7FFFFFFF]
; run: %fcvt_to_sint_sat([-0x8.1 0x0.0 0x0.0 -0x1.0p100]) == [-8 0 0 0x80000000]
function %fcvt_to_uint_sat(f32x4) -> i32x4 {
block0(v0:f32x4):
v1 = fcvt_to_uint_sat.i32x4 v0
return v1
}
; run: %fcvt_to_uint_sat([0x1.0 0x4.2 0x4.6 0x1.0p100]) == [1 4 4 0xFFFFFFFF]
; run: %fcvt_to_uint_sat([-0x8.1 -0x0.0 0x0.0 -0x1.0p100]) == [0 0 0 0]
; run: %fcvt_to_uint_sat([0xB2D05E00.0 0.0 0.0 0.0]) == [3000000000 0 0 0]