Enable the ssa verifier in debug builds (#5354)
Enable regalloc2's SSA verifier in debug builds to check for any outstanding reuse of virtual registers in def constraints. As fuzzing enables debug_assertions, this will enable the SSA verifier when fuzzing as well.
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@@ -1171,6 +1171,13 @@ impl MachInst for Inst {
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}
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}
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fn is_trap(&self) -> bool {
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match self {
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Self::Udf { .. } => true,
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_ => false,
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}
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}
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fn is_args(&self) -> bool {
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match self {
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Self::Args { .. } => true,
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@@ -686,6 +686,13 @@ impl MachInst for Inst {
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}
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}
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fn is_trap(&self) -> bool {
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match self {
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Self::Udf { .. } => true,
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_ => false,
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}
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}
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fn is_args(&self) -> bool {
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match self {
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Self::Args { .. } => true,
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@@ -1127,6 +1127,13 @@ impl MachInst for Inst {
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}
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}
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fn is_trap(&self) -> bool {
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match self {
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Self::Trap { .. } => true,
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_ => false,
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}
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}
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fn is_args(&self) -> bool {
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match self {
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Self::Args { .. } => true,
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@@ -2244,6 +2244,13 @@ impl MachInst for Inst {
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}
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}
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fn is_trap(&self) -> bool {
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match self {
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Self::Ud2 { .. } => true,
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_ => false,
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}
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}
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fn is_args(&self) -> bool {
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match self {
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Self::Args { .. } => true,
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