Enable the ssa verifier in debug builds (#5354)

Enable regalloc2's SSA verifier in debug builds to check for any outstanding reuse of virtual registers in def constraints. As fuzzing enables debug_assertions, this will enable the SSA verifier when fuzzing as well.
This commit is contained in:
Trevor Elliott
2022-12-07 12:22:51 -08:00
committed by GitHub
parent f0c4b6f3a1
commit c5379051c4
22 changed files with 304 additions and 254 deletions

View File

@@ -1171,6 +1171,13 @@ impl MachInst for Inst {
}
}
fn is_trap(&self) -> bool {
match self {
Self::Udf { .. } => true,
_ => false,
}
}
fn is_args(&self) -> bool {
match self {
Self::Args { .. } => true,

View File

@@ -686,6 +686,13 @@ impl MachInst for Inst {
}
}
fn is_trap(&self) -> bool {
match self {
Self::Udf { .. } => true,
_ => false,
}
}
fn is_args(&self) -> bool {
match self {
Self::Args { .. } => true,

View File

@@ -1127,6 +1127,13 @@ impl MachInst for Inst {
}
}
fn is_trap(&self) -> bool {
match self {
Self::Trap { .. } => true,
_ => false,
}
}
fn is_args(&self) -> bool {
match self {
Self::Args { .. } => true,

View File

@@ -2244,6 +2244,13 @@ impl MachInst for Inst {
}
}
fn is_trap(&self) -> bool {
match self {
Self::Ud2 { .. } => true,
_ => false,
}
}
fn is_args(&self) -> bool {
match self {
Self::Args { .. } => true,