Begin an Intel-specific instruction group.

Add instructions representing Intel's division instructions which use a
numerator that is twice as wide as the denominator and produce both the
quotient and remainder.

Add encodings for the x86_[su]divmodx instructions.

lib/cretonne/meta/isa/intel/recipes.py

@@ -6,7 +6,7 @@ from cdsl.isa import EncRecipe
 from cdsl.predicates import IsSignedInt, IsEqual
 from base.formats import Unary, UnaryImm, Binary, BinaryImm, MultiAry
 from base.formats import Call, IndirectCall, Store, Load
-from base.formats import RegMove
+from base.formats import RegMove, Ternary
 from .registers import GPR, ABCD
 
 try:
@@ -239,6 +239,15 @@ rc = TailRecipe(
         modrm_r_bits(in_reg0, bits, sink);
         ''')
 
+# XX /n for division: inputs in %rax, %rdx, r. Outputs in %rax, %rdx.
+div = TailRecipe(
+        'div', Ternary, size=1,
+        ins=(GPR.rax, GPR.rdx, GPR), outs=(GPR.rax, GPR.rdx),
+        emit='''
+        PUT_OP(bits, rex1(in_reg2), sink);
+        modrm_r_bits(in_reg2, bits, sink);
+        ''')
+
 # XX /n ib with 8-bit immediate sign-extended.
 rib = TailRecipe(
         'rib', BinaryImm, size=2, ins=GPR, outs=0,