Add controls for enabling M, F, and D RISC-V extensions.

Three predicates affect each extension:

- supports_m determines whether the target CPU supports the instruction set.
- enable_m determines if the instructions should be used, assuming they're
  available.
- use_m is the predicate used to actually use the instructions.

meta/cretonne/settings.py

@@ -20,8 +20,16 @@ opt_level = EnumSetting(
 
 is_64bit = BoolSetting("Enable 64-bit code generation")
 
+enable_float = BoolSetting(
+        """Enable the use of floating-point instructions""",
+        default=True)
+
 enable_simd = BoolSetting(
         """Enable the use of SIMD instructions.""",
         default=True)
 
+enable_atomics = BoolSetting(
+        """Enable the use of atomic instructions""",
+        default=True)
+
 group.close(globals())