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CFI improvements to the AArch64 fiber implementation (#4195)

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Now the fiber implementation on AArch64 authenticates function
return addresses and includes the relevant BTI instructions, except
on macOS.

Also, change the locations of the saved FP and LR registers on the
fiber stack to make them compliant with the Procedure Call Standard
for the Arm 64-bit Architecture.

Copyright (c) 2022, Arm Limited.
This commit is contained in:
Anton Kirilov
2022-06-09 15:17:12 +01:00
committed by GitHub
parent 823817595a
commit c15c3061ca
6 changed files with 104 additions and 14 deletions
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3
cranelift/codegen/src/isa/aarch64/abi.rs
View File

@@ -623,11 +623,12 @@ impl ABIMachineSpec for AArch64MachineDeps {
}
fn gen_debug_frame_info(
call_conv: isa::CallConv,
flags: &settings::Flags,
_isa_flags: &Vec<settings::Value>,
) -> SmallInstVec<Inst> {
let mut insts = SmallVec::new();
if flags.unwind_info() {
if flags.unwind_info() && call_conv.extends_apple_aarch64() {
insts.push(Inst::Unwind {
inst: UnwindInst::Aarch64SetPointerAuth {
return_addresses: false,

4
cranelift/codegen/src/isa/aarch64/inst/unwind/systemv.rs
View File

@@ -104,7 +104,7 @@ mod tests {
_ => panic!("expected unwind information"),
};
assert_eq!(format!("{:?}", fde), "FrameDescriptionEntry { address: Constant(1234), length: 24, lsda: None, instructions: [(0, ValExpression(Register(34), Expression { operations: [Simple(DwOp(48))] })), (4, CfaOffset(16)), (4, Offset(Register(29), -16)), (4, Offset(Register(30), -8)), (8, CfaRegister(Register(29)))] }");
assert_eq!(format!("{:?}", fde), "FrameDescriptionEntry { address: Constant(1234), length: 24, lsda: None, instructions: [(4, CfaOffset(16)), (4, Offset(Register(29), -16)), (4, Offset(Register(30), -8)), (8, CfaRegister(Register(29)))] }");
}
fn create_function(call_conv: CallConv, stack_slot: Option<StackSlotData>) -> Function {
@@ -146,7 +146,7 @@ mod tests {
assert_eq!(
format!("{:?}", fde),
"FrameDescriptionEntry { address: Constant(4321), length: 16, lsda: None, instructions: [(0, ValExpression(Register(34), Expression { operations: [Simple(DwOp(48))] }))] }"
"FrameDescriptionEntry { address: Constant(4321), length: 16, lsda: None, instructions: [] }"
);
}

5
cranelift/codegen/src/machinst/abi_impl.rs
View File

@@ -406,6 +406,7 @@ pub trait ABIMachineSpec {
/// Generates extra unwind instructions for a new frame for this
/// architecture, whether the frame has a prologue sequence or not.
fn gen_debug_frame_info(
_call_conv: isa::CallConv,
_flags: &settings::Flags,
_isa_flags: &Vec<settings::Value>,
) -> SmallInstVec<Self::I> {
@@ -1238,7 +1239,9 @@ impl<M: ABIMachineSpec> ABICallee for ABICalleeImpl<M> {
self.fixed_frame_storage_size,
);
insts.extend(M::gen_debug_frame_info(&self.flags, &self.isa_flags).into_iter());
insts.extend(
M::gen_debug_frame_info(self.call_conv, &self.flags, &self.isa_flags).into_iter(),
);
if self.setup_frame {
// set up frame