cranelift: add i64.{ishl,ushr,ashr} libcalls.
These libcalls are useful for 32-bit platforms.
On x86_32 in particular, commit 4ec16fa0 added support for legalizing
64-bit shifts through SIMD operations. However, that legalization
requires SIMD to be enabled and SSE 4.1 to be supported, which is not
acceptable as a hard requirement.
This commit is contained in:
@@ -32,6 +32,12 @@ pub enum LibCall {
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UremI64,
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/// srem.i64
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SremI64,
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/// ishl.i64
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IshlI64,
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/// ushr.i64
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UshrI64,
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/// sshr.i64
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SshrI64,
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/// ceil.f32
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CeilF32,
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/// ceil.f64
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@@ -75,6 +81,9 @@ impl FromStr for LibCall {
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"SdivI64" => Ok(Self::SdivI64),
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"UremI64" => Ok(Self::UremI64),
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"SremI64" => Ok(Self::SremI64),
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"IshlI64" => Ok(Self::IshlI64),
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"UshrI64" => Ok(Self::UshrI64),
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"SshrI64" => Ok(Self::SshrI64),
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"CeilF32" => Ok(Self::CeilF32),
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"CeilF64" => Ok(Self::CeilF64),
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"FloorF32" => Ok(Self::FloorF32),
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@@ -105,6 +114,9 @@ impl LibCall {
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Opcode::Sdiv => Self::SdivI64,
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Opcode::Urem => Self::UremI64,
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Opcode::Srem => Self::SremI64,
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Opcode::Ishl => Self::IshlI64,
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Opcode::Ushr => Self::UshrI64,
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Opcode::Sshr => Self::SshrI64,
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_ => return None,
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},
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types::F32 => match opcode {
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@@ -13,6 +13,7 @@ use crate::isa::encoding::base_size;
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use crate::isa::encoding::{Encoding, RecipeSizing};
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use crate::isa::RegUnit;
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use crate::isa::{self, TargetIsa};
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use crate::legalizer::expand_as_libcall;
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use crate::predicates;
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use crate::regalloc::RegDiversions;
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@@ -1428,10 +1429,20 @@ fn convert_ushr(
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pos.func.dfg.replace(inst).x86_psrl(arg0, shift_index);
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} else if arg0_type == I64 {
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// 64 bit shifts need to be legalized on x86_32.
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let value = expand_dword_to_xmm(&mut pos, arg0, arg0_type);
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let amount = expand_dword_to_xmm(&mut pos, arg1, arg1_type);
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let shifted = pos.ins().x86_psrl(value, amount);
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contract_dword_from_xmm(&mut pos, inst, shifted, arg0_type);
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let x86_isa = isa
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.as_any()
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.downcast_ref::<isa::x86::Isa>()
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.expect("the target ISA must be x86 at this point");
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if x86_isa.isa_flags.has_sse41() {
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// if we have pinstrq/pextrq (SSE 4.1), legalize to that
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let value = expand_dword_to_xmm(&mut pos, arg0, arg0_type);
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let amount = expand_dword_to_xmm(&mut pos, arg1, arg1_type);
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let shifted = pos.ins().x86_psrl(value, amount);
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contract_dword_from_xmm(&mut pos, inst, shifted, arg0_type);
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} else {
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// otherwise legalize to libcall
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expand_as_libcall(inst, func, isa);
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}
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} else {
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// Everything else should be already legal.
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unreachable!()
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@@ -1502,10 +1513,20 @@ fn convert_ishl(
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pos.func.dfg.replace(inst).x86_psll(arg0, shift_index);
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} else if arg0_type == I64 {
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// 64 bit shifts need to be legalized on x86_32.
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let value = expand_dword_to_xmm(&mut pos, arg0, arg0_type);
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let amount = expand_dword_to_xmm(&mut pos, arg1, arg1_type);
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let shifted = pos.ins().x86_psll(value, amount);
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contract_dword_from_xmm(&mut pos, inst, shifted, arg0_type);
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let x86_isa = isa
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.as_any()
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.downcast_ref::<isa::x86::Isa>()
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.expect("the target ISA must be x86 at this point");
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if x86_isa.isa_flags.has_sse41() {
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// if we have pinstrq/pextrq (SSE 4.1), legalize to that
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let value = expand_dword_to_xmm(&mut pos, arg0, arg0_type);
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let amount = expand_dword_to_xmm(&mut pos, arg1, arg1_type);
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let shifted = pos.ins().x86_psll(value, amount);
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contract_dword_from_xmm(&mut pos, inst, shifted, arg0_type);
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} else {
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// otherwise legalize to libcall
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expand_as_libcall(inst, func, isa);
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}
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} else {
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// Everything else should be already legal.
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unreachable!()
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@@ -35,7 +35,7 @@ mod table;
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use self::call::expand_call;
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use self::globalvalue::expand_global_value;
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use self::heap::expand_heap_addr;
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use self::libcall::expand_as_libcall;
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pub(crate) use self::libcall::expand_as_libcall;
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use self::table::expand_table_addr;
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enum LegalizeInstResult {
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