X64: port fvpromote to ISLE (#4242)

cranelift/codegen/src/isa/x64/inst.isle

@@ -2833,6 +2833,13 @@
             (_ Unit (emit (MInst.XmmUnaryRmR (SseOpcode.Cvtss2sd) x dst))))
         dst))
 
+;; Helper for creating `cvtps2pd` instructions.
+(decl x64_cvtps2pd (Xmm) Xmm)
+(rule (x64_cvtps2pd x)
+      (let ((dst WritableXmm (temp_writable_xmm))
+           (_ Unit (emit (MInst.XmmUnaryRmR (SseOpcode.Cvtps2pd) x dst))))
+        dst))
+
 ;; Helpers for creating `pcmpeq*` instructions.
 (decl x64_pcmpeq (Type Xmm XmmMem) Xmm)
 (rule (x64_pcmpeq $I8X16 x y) (x64_pcmpeqb x y))

cranelift/codegen/src/isa/x64/lower.isle

@@ -2322,6 +2322,10 @@
 (rule (lower (has_type $F64 (fpromote x)))
       (x64_cvtss2sd x))
 
+;; Rules for `fvpromote` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+(rule (lower (has_type $F64X2 (fvpromote_low x)))
+      (x64_cvtps2pd (put_in_xmm x)))
+
 ;; Rules for `fmin` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 (rule (lower (has_type $F32 (fmin x y)))

cranelift/codegen/src/isa/x64/lower.rs

@@ -1045,13 +1045,7 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
         }
 
         Opcode::FvpromoteLow => {
-            let src = RegMem::reg(put_input_in_reg(ctx, inputs[0]));
+            implemented_in_isle(ctx);
-            let dst = get_output_reg(ctx, outputs[0]).only_reg().unwrap();
-            ctx.emit(Inst::xmm_unary_rm_r(
-                SseOpcode::Cvtps2pd,
-                RegMem::from(src),
-                dst,
-            ));
         }
 
         Opcode::Fdemote => {