[s390x, abi_impl] Support struct args using explicit pointers (#4585)

This adds support for StructArgument on s390x.  The ABI for this
platform requires that the address of the buffer holding the copy
of the struct argument is passed from caller to callee as hidden
pointer, using a register or overflow stack slot.

To implement this, I've added an optional "pointer" filed to
ABIArg::StructArg, and code to handle the pointer both in common
abi_impl code and the s390x back-end.

One notable change necessary to make this work involved the
"copy_to_arg_order" mechanism.  Currently, for struct args
we only need to copy the data (and that need to happen before
setting up any other args), while for non-struct args we only
need to set up the appropriate registers or stack slots.
This order is ensured by sorting the arguments appropriately
into a "copy_to_arg_order" list.

However, for struct args with explicit pointers we need to *both*
copy the data (again, before everything else), *and* set up a
register or stack slot.  Since we now need to touch the argument
twice, we cannot solve the ordering problem by a simple sort.
Instead, the abi_impl common code now provided *two* callbacks,
emit_copy_regs_to_buffer and emit_copy_regs_to_arg, and expects
the back end to first call copy..to_buffer for all args, and
then call copy.._to_arg for all args.  This required updates
to all back ends.

In the s390x back end, in addition to the new ABI code, I'm now
adding code to actually copy the struct data, using the MVC
instruction (for small buffers) or a memcpy libcall (for larger
buffers).  This also requires a bit of new infrastructure:
- MVC is the first memory-to-memory instruction we use, which
  needed a bit of memory argument tweaking
- We also need to set up the infrastructure to emit libcalls.

(This implements the first half of issue #4565.)

cranelift/filetests/filetests/isa/aarch64/call.clif

@@ -281,8 +281,8 @@ block0(v0: i64):
 ; block0:
 ;   mov x7, x0
 ;   movz x0, #42
-;   mov x1, x7
 ;   movz x2, #42
+;   mov x1, x7
 ;   ldr x10, 8 ; b 12 ; data TestCase { length: 3, ascii: [102, 49, 49, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] } + 0
 ;   blr x10
 ;   ldp fp, lr, [sp], #16

cranelift/filetests/filetests/isa/s390x/struct-arg.clif

@@ -0,0 +1,124 @@
+test compile precise-output
+target s390x
+
+function u0:0(i64 sarg(64)) -> i8 system_v {
+block0(v0: i64):
+    v1 = load.i8 v0
+    return v1
+}
+
+; block0:
+;   llc %r2, 0(%r2)
+;   br %r14
+
+function u0:1(i64 sarg(64), i64) -> i8 system_v {
+block0(v0: i64, v1: i64):
+    v2 = load.i8 v1
+    v3 = load.i8 v0
+    v4 = iadd.i8 v2, v3
+    return v4
+}
+
+; block0:
+;   llc %r5, 0(%r3)
+;   llc %r2, 0(%r2)
+;   ark %r2, %r5, %r2
+;   br %r14
+
+function u0:2(i64) -> i8 system_v {
+fn1 = colocated u0:0(i64 sarg(64)) -> i8 system_v
+
+block0(v0: i64):
+    v1 = call fn1(v0)
+    return v1
+}
+
+;   stmg %r14, %r15, 112(%r15)
+;   aghi %r15, -224
+;   virtual_sp_offset_adjust 224
+; block0:
+;   mvc 160(63,%r15), 0(%r2)
+;   la %r2, 160(%r15)
+;   brasl %r14, u0:0
+;   lmg %r14, %r15, 336(%r15)
+;   br %r14
+
+function u0:3(i64, i64) -> i8 system_v {
+fn1 = colocated u0:0(i64, i64 sarg(64)) -> i8 system_v
+
+block0(v0: i64, v1: i64):
+    v2 = call fn1(v0, v1)
+    return v2
+}
+
+;   stmg %r14, %r15, 112(%r15)
+;   aghi %r15, -224
+;   virtual_sp_offset_adjust 224
+; block0:
+;   mvc 160(63,%r15), 0(%r3)
+;   la %r3, 160(%r15)
+;   brasl %r14, u0:0
+;   lmg %r14, %r15, 336(%r15)
+;   br %r14
+
+function u0:4(i64 sarg(256), i64 sarg(64)) -> i8 system_v {
+block0(v0: i64, v1: i64):
+    v2 = load.i8 v0
+    v3 = load.i8 v1
+    v4 = iadd.i8 v2, v3
+    return v4
+}
+
+; block0:
+;   llc %r5, 0(%r2)
+;   llc %r2, 0(%r3)
+;   ark %r2, %r5, %r2
+;   br %r14
+
+function u0:5(i64, i64, i64) -> i8 system_v {
+fn1 = colocated u0:0(i64, i64 sarg(256), i64 sarg(64)) -> i8 system_v
+
+block0(v0: i64, v1: i64, v2: i64):
+    v3 = call fn1(v0, v1, v2)
+    return v3
+}
+
+;   stmg %r14, %r15, 112(%r15)
+;   aghi %r15, -480
+;   virtual_sp_offset_adjust 480
+; block0:
+;   mvc 160(255,%r15), 0(%r3)
+;   mvc 416(63,%r15), 0(%r4)
+;   la %r3, 160(%r15)
+;   la %r4, 416(%r15)
+;   brasl %r14, u0:0
+;   lmg %r14, %r15, 592(%r15)
+;   br %r14
+
+function u0:6(i64, i64, i64) -> i8 system_v {
+fn1 = colocated u0:0(i64, i64 sarg(1024), i64 sarg(64)) -> i8 system_v
+
+block0(v0: i64, v1: i64, v2: i64):
+    v3 = call fn1(v0, v1, v2)
+    return v3
+}
+
+;   stmg %r7, %r15, 56(%r15)
+;   aghi %r15, -1248
+;   virtual_sp_offset_adjust 1248
+; block0:
+;   lgr %r7, %r2
+;   lgr %r9, %r4
+;   la %r2, 160(%r15)
+;   la %r3, 0(%r3)
+;   lghi %r4, 1024
+;   brasl %r14, %Memcpy
+;   lgr %r4, %r9
+;   mvc 1184(63,%r15), 0(%r4)
+;   lgr %r2, %r7
+;   la %r3, 160(%r15)
+;   la %r4, 1184(%r15)
+;   brasl %r14, u0:0
+;   lmg %r7, %r15, 1304(%r15)
+;   br %r14
+