Add a trapff instruction.

This is the floating point equivalent of trapif: Trap when a given
condition is in the floating-point flags.

Define Intel encodings comparable to the trapif encodings.

lib/cretonne/meta/base/formats.py

@@ -75,6 +75,7 @@ RegFill = InstructionFormat(
 Trap = InstructionFormat(trapcode)
 CondTrap = InstructionFormat(VALUE, trapcode)
 IntCondTrap = InstructionFormat(intcc, VALUE, trapcode)
+FloatCondTrap = InstructionFormat(floatcc, VALUE, trapcode)
 
 # Finally extract the names of global variables in this module.
 InstructionFormat.extract_names(globals())

lib/cretonne/meta/base/instructions.py

@@ -176,6 +176,15 @@ trapif = Instruction(
         """,
         ins=(Cond, f, code), can_trap=True)
 
+Cond = Operand('Cond', floatcc)
+f = Operand('f', fflags)
+
+trapff = Instruction(
+        'trapff', r"""
+        Trap when condition is true in floating point CPU flags.
+        """,
+        ins=(Cond, f, code), can_trap=True)
+
 rvals = Operand('rvals', VARIABLE_ARGS, doc='return values')
 
 x_return = Instruction(

lib/cretonne/meta/isa/intel/encodings.py

@@ -357,6 +357,8 @@ I64.enc(base.trap, *r.trap(0x0f, 0x0b))
 # Using a standard EncRecipe, not the TailRecipe.
 I32.enc(base.trapif, r.trapif, 0)
 I64.enc(base.trapif, r.trapif, 0)
+I32.enc(base.trapff, r.trapff, 0)
+I64.enc(base.trapff, r.trapff, 0)
 
 #
 # Comparisons

lib/cretonne/meta/isa/intel/recipes.py

@@ -8,7 +8,7 @@ from cdsl.registers import RegClass
 from base.formats import Unary, UnaryImm, Binary, BinaryImm, MultiAry, NullAry
 from base.formats import Trap, Call, IndirectCall, Store, Load
 from base.formats import IntCompare, FloatCompare, IntCond, FloatCond
-from base.formats import IntSelect, IntCondTrap
+from base.formats import IntSelect, IntCondTrap, FloatCondTrap
 from base.formats import Jump, Branch, BranchInt, BranchFloat
 from base.formats import Ternary, FuncAddr, UnaryGlobalVar
 from base.formats import RegMove, RegSpill, RegFill, CopySpecial
@@ -292,6 +292,20 @@ trapif = EncRecipe(
         sink.put1(0x0b);
         ''')
 
+trapff = EncRecipe(
+        'trapff', FloatCondTrap, size=4, ins=FLAG.eflags, outs=(),
+        clobbers_flags=False,
+        instp=floatccs(FloatCondTrap),
+        emit='''
+        // Jump over a 2-byte ud2.
+        sink.put1(0x70 | (fcc2opc(cond.inverse()) as u8));
+        sink.put1(2);
+        // ud2.
+        sink.put1(0x0f);
+        sink.put1(0x0b);
+        ''')
+
+
 # XX /r
 rr = TailRecipe(
         'rr', Binary, size=1, ins=(GPR, GPR), outs=0,

lib/cretonne/src/ir/instructions.rs

@@ -270,6 +270,12 @@ pub enum InstructionData {
         arg: Value,
         code: ir::TrapCode,
     },
+    FloatCondTrap {
+        opcode: Opcode,
+        cond: FloatCC,
+        arg: Value,
+        code: ir::TrapCode,
+    },
 }
 
 /// A variable list of `Value` operands used for function call arguments and passing arguments to

lib/cretonne/src/verifier/mod.rs

@@ -366,6 +366,7 @@ impl<'a> Verifier<'a> {
             Trap { .. } |
             CondTrap { .. } |
             IntCondTrap { .. } |
+            FloatCondTrap { .. } |
             NullAry { .. } => {}
         }
 

lib/cretonne/src/write.rs

@@ -429,6 +429,7 @@ pub fn write_operands(
         Trap { code, .. } => write!(w, " {}", code),
         CondTrap { arg, code, .. } => write!(w, " {}, {}", arg, code),
         IntCondTrap { cond, arg, code, .. } => write!(w, " {} {}, {}", cond, arg, code),
+        FloatCondTrap { cond, arg, code, .. } => write!(w, " {} {}, {}", cond, arg, code),
     }
 }
 

lib/reader/src/parser.rs

@@ -2363,6 +2363,21 @@ impl<'a> Parser<'a> {
                     code,
                 }
             }
+            InstructionFormat::FloatCondTrap => {
+                let cond = self.match_enum("expected floatcc condition code")?;
+                let arg = self.match_value("expected SSA value operand")?;
+                self.match_token(
+                    Token::Comma,
+                    "expected ',' between operands",
+                )?;
+                let code = self.match_enum("expected trap code")?;
+                InstructionData::FloatCondTrap {
+                    opcode,
+                    cond,
+                    arg,
+                    code,
+                }
+            }
         };
         Ok(idata)
     }