diff --git a/lib/cretonne/meta/isa/intel/encodings.py b/lib/cretonne/meta/isa/intel/encodings.py
index f9c7f041c8..75378db853 100644
--- a/lib/cretonne/meta/isa/intel/encodings.py
+++ b/lib/cretonne/meta/isa/intel/encodings.py
@@ -227,6 +227,10 @@ enc_i32_i64(base.regfill, r.rfi32, 0x8b)
 enc_both(base.fill.b1, r.fiSib32, 0x8b)
 enc_both(base.regfill.b1, r.rfi32, 0x8b)
 
+# Push and Pop
+I64.enc(x86.push.i64, *r.pushq(0x50))
+I64.enc(x86.pop.i64, *r.popq(0x58))
+
 #
 # Float loads and stores.
 #
diff --git a/lib/cretonne/meta/isa/intel/instructions.py b/lib/cretonne/meta/isa/intel/instructions.py
index 3389f77708..82ff8ec90d 100644
--- a/lib/cretonne/meta/isa/intel/instructions.py
+++ b/lib/cretonne/meta/isa/intel/instructions.py
@@ -99,10 +99,9 @@ fmax = Instruction(
         """,
         ins=(x, y), outs=a)
 
-WideInt = TypeVar(
-        'WideInt', 'An integer type with 16 to 64 bits',
-        ints=(16, 64))
-x = Operand('x', WideInt)
+
+Int = TypeVar('Int', 'A scalar integer type', ints=True)
+x = Operand('x', Int)
 
 push = Instruction(
     'x86_push', "Pushes onto the stack.",
diff --git a/lib/cretonne/meta/isa/intel/recipes.py b/lib/cretonne/meta/isa/intel/recipes.py
index 531e291630..a746ac7a38 100644
--- a/lib/cretonne/meta/isa/intel/recipes.py
+++ b/lib/cretonne/meta/isa/intel/recipes.py
@@ -5,7 +5,7 @@ from __future__ import absolute_import
 from cdsl.isa import EncRecipe
 from cdsl.predicates import IsSignedInt, IsEqual, Or
 from cdsl.registers import RegClass
-from base.formats import Unary, UnaryImm, Binary, BinaryImm, MultiAry
+from base.formats import Unary, UnaryImm, Binary, BinaryImm, MultiAry, NullAry
 from base.formats import Trap, Call, IndirectCall, Store, Load
 from base.formats import IntCompare, FloatCompare, IntCond, FloatCond
 from base.formats import Jump, Branch, BranchInt, BranchFloat
@@ -472,6 +472,18 @@ puiq = TailRecipe(
         sink.put8(imm as u64);
         ''')
 
+pushq = TailRecipe(
+    'pushq', Unary, size=0, ins=GPR, outs=(),
+    emit='''
+    PUT_OP(bits | (in_reg0 & 7), rex1(in_reg0), sink);
+    ''')
+
+popq = TailRecipe(
+    'popq', NullAry, size=0, ins=(), outs=GPR,
+    emit='''
+    PUT_OP(bits | (out_reg0 & 7), rex1(out_reg0), sink);
+    ''')
+
 # XX+rd id with Abs4 function relocation.
 fnaddr4 = TailRecipe(
         'fnaddr4', FuncAddr, size=4, ins=(), outs=GPR,
diff --git a/lib/cretonne/src/legalizer/boundary.rs b/lib/cretonne/src/legalizer/boundary.rs
index e9f7f4c564..ea81c1ff95 100644
--- a/lib/cretonne/src/legalizer/boundary.rs
+++ b/lib/cretonne/src/legalizer/boundary.rs
@@ -82,6 +82,8 @@ fn legalize_entry_params(func: &mut Function, entry: Ebb) {
             pos.func.dfg.attach_ebb_param(entry, arg);
             match abi_type.purpose {
                 ArgumentPurpose::Normal => {}
+                ArgumentPurpose::FramePointer => {}
+                ArgumentPurpose::CalleeSaved => {}
                 ArgumentPurpose::StructReturn => {
                     assert!(!has_sret, "Multiple sret arguments found");
                     has_sret = true;