cranelift: Use x64_ prefix to disambiguate with clif in ISLE

Instead of using `m_` like we used to, which was short for "mach inst" but not
obvious or clear at all.
This commit is contained in:
Nick Fitzgerald
2022-01-13 13:34:55 -08:00
parent a41fdb0303
commit b78731839b
2 changed files with 47 additions and 48 deletions

View File

@@ -73,8 +73,7 @@
(src Reg)
(dst WritableReg))
(LoadEffectiveAddress (addr SyntheticAmode)
(dst WritableReg))
))
(dst WritableReg))))
(type OperandSize extern
(enum Size8
@@ -534,9 +533,9 @@
(let ((wr WritableReg (temp_writable_reg ty))
(r Reg (writable_reg_to_reg wr))
(_ Unit (emit (MInst.XmmRmR (sse_cmp_op $I32X4)
r
(RegMem.Reg r)
wr))))
r
(RegMem.Reg r)
wr))))
r))
;; Helper for creating an SSE register holding an `i64x2` from two `i64` values.
@@ -697,8 +696,8 @@
;;
;; Use `m_` prefix (short for "mach inst") to disambiguate with the ISLE-builtin
;; `and` operator.
(decl m_and (Type Reg RegMemImm) Reg)
(rule (m_and ty src1 src2)
(decl x64_and (Type Reg RegMemImm) Reg)
(rule (x64_and ty src1 src2)
(alu_rmi_r ty
(AluRmiROpcode.And)
src1
@@ -766,9 +765,9 @@
(let ((wr WritableReg (temp_writable_reg ty))
(r Reg (writable_reg_to_reg wr))
(_ Unit (emit (MInst.XmmRmR (sse_xor_op ty)
r
(RegMem.Reg r)
wr))))
r
(RegMem.Reg r)
wr))))
r))
;; Special case for `f32` zero immediates to use `xorps`.
@@ -807,14 +806,14 @@
;; Helper for creating `rotl` instructions (prefixed with "m_", short for "mach
;; inst", to disambiguate this from clif's `rotl`).
(decl m_rotl (Type Reg Imm8Reg) Reg)
(rule (m_rotl ty src1 src2)
(decl x64_rotl (Type Reg Imm8Reg) Reg)
(rule (x64_rotl ty src1 src2)
(shift_r ty (ShiftKind.RotateLeft) src1 src2))
;; Helper for creating `rotr` instructions (prefixed with "m_", short for "mach
;; inst", to disambiguate this from clif's `rotr`).
(decl m_rotr (Type Reg Imm8Reg) Reg)
(rule (m_rotr ty src1 src2)
(decl x64_rotr (Type Reg Imm8Reg) Reg)
(rule (x64_rotr ty src1 src2)
(shift_r ty (ShiftKind.RotateRight) src1 src2))
;; Helper for creating `shl` instructions.