diff --git a/cranelift/codegen/src/machinst/lower.rs b/cranelift/codegen/src/machinst/lower.rs index d6688c054d..3444b64487 100644 --- a/cranelift/codegen/src/machinst/lower.rs +++ b/cranelift/codegen/src/machinst/lower.rs @@ -377,12 +377,27 @@ impl<'func, I: VCodeInst> Lower<'func, I> { } } - // Make a sret register, if one is needed. + // Find the sret register, if it's used. let mut sret_reg = None; - for ret in &vcode.abi().signature().returns.clone() { + for ret in vcode.abi().signature().returns.iter() { if ret.purpose == ArgumentPurpose::StructReturn { - assert!(sret_reg.is_none()); - sret_reg = Some(vregs.alloc(ret.value_type)?); + let entry_bb = f.stencil.layout.entry_block().unwrap(); + for (¶m, sig_param) in f + .dfg + .block_params(entry_bb) + .iter() + .zip(vcode.abi().signature().params.iter()) + { + if sig_param.purpose == ArgumentPurpose::StructReturn { + let regs = value_regs[param]; + assert!(regs.len() == 1); + + assert!(sret_reg.is_none()); + sret_reg = Some(regs); + } + } + + assert!(sret_reg.is_some()); } } @@ -576,24 +591,6 @@ impl<'func, I: VCodeInst> Lower<'func, I> { { self.emit(insn); } - if self.abi().signature().params[i].purpose == ArgumentPurpose::StructReturn { - assert!(regs.len() == 1); - let ty = self.abi().signature().params[i].value_type; - // The ABI implementation must have ensured that a StructReturn - // arg is present in the return values. - assert!(self - .abi() - .signature() - .returns - .iter() - .position(|ret| ret.purpose == ArgumentPurpose::StructReturn) - .is_some()); - self.emit(I::gen_move( - Writable::from_reg(self.sret_reg.unwrap().regs()[0]), - regs.regs()[0].to_reg(), - ty, - )); - } } if let Some(insn) = self .vcode diff --git a/cranelift/filetests/filetests/isa/aarch64/call.clif b/cranelift/filetests/filetests/isa/aarch64/call.clif index b72957697a..9b7b7ec53d 100644 --- a/cranelift/filetests/filetests/isa/aarch64/call.clif +++ b/cranelift/filetests/filetests/isa/aarch64/call.clif @@ -850,16 +850,14 @@ block0(v0: i64): ; VCode: ; block0: -; mov x5, x8 -; movz x4, #42 -; str x4, [x8] +; movz x2, #42 +; str x2, [x8] ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mov x5, x8 -; mov x4, #0x2a -; str x4, [x8] +; mov x2, #0x2a +; str x2, [x8] ; ret function %f18(i64) -> i64 { @@ -905,13 +903,14 @@ block0(v0: i64): ; VCode: ; stp fp, lr, [sp, #-16]! ; mov fp, sp -; str x24, [sp, #-16]! +; str x23, [sp, #-16]! ; block0: -; mov x24, x8 -; load_ext_name x4, TestCase(%g)+0 -; blr x4 -; mov x8, x24 -; ldr x24, [sp], #16 +; mov x23, x8 +; load_ext_name x2, TestCase(%g)+0 +; mov x8, x23 +; blr x2 +; mov x8, x23 +; ldr x23, [sp], #16 ; ldp fp, lr, [sp], #16 ; ret ; @@ -919,16 +918,17 @@ block0(v0: i64): ; block0: ; offset 0x0 ; stp x29, x30, [sp, #-0x10]! ; mov x29, sp -; str x24, [sp, #-0x10]! +; str x23, [sp, #-0x10]! ; block1: ; offset 0xc -; mov x24, x8 -; ldr x4, #0x18 +; mov x23, x8 +; ldr x2, #0x18 ; b #0x20 ; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g 0 ; .byte 0x00, 0x00, 0x00, 0x00 -; blr x4 -; mov x8, x24 -; ldr x24, [sp], #0x10 +; mov x8, x23 +; blr x2 +; mov x8, x23 +; ldr x23, [sp], #0x10 ; ldp x29, x30, [sp], #0x10 ; ret diff --git a/cranelift/filetests/filetests/isa/x64/struct-ret.clif b/cranelift/filetests/filetests/isa/x64/struct-ret.clif index 59c0d681f0..ee5db4f4a4 100644 --- a/cranelift/filetests/filetests/isa/x64/struct-ret.clif +++ b/cranelift/filetests/filetests/isa/x64/struct-ret.clif @@ -12,9 +12,9 @@ block0(v0: i64): ; pushq %rbp ; movq %rsp, %rbp ; block0: +; movl $42, %eax +; movq %rax, 0(%rdi) ; movq %rdi, %rax -; movl $42, %edx -; movq %rdx, 0(%rdi) ; movq %rbp, %rsp ; popq %rbp ; ret @@ -24,9 +24,9 @@ block0(v0: i64): ; pushq %rbp ; movq %rsp, %rbp ; block1: ; offset 0x4 +; movl $0x2a, %eax +; movq %rax, (%rdi) ; trap: heap_oob ; movq %rdi, %rax -; movl $0x2a, %edx -; movq %rdx, (%rdi) ; trap: heap_oob ; movq %rbp, %rsp ; popq %rbp ; retq @@ -79,8 +79,9 @@ block0(v0: i64): ; movq %r15, 0(%rsp) ; block0: ; movq %rdi, %r15 -; load_ext_name %f4+0, %rdx -; call *%rdx +; load_ext_name %f4+0, %rax +; movq %r15, %rdi +; call *%rax ; movq %r15, %rax ; movq 0(%rsp), %r15 ; addq %rsp, $16, %rsp @@ -96,8 +97,9 @@ block0(v0: i64): ; movq %r15, (%rsp) ; block1: ; offset 0xc ; movq %rdi, %r15 -; movabsq $0, %rdx ; reloc_external Abs8 %f4 0 -; callq *%rdx +; movabsq $0, %rax ; reloc_external Abs8 %f4 0 +; movq %r15, %rdi +; callq *%rax ; movq %r15, %rax ; movq (%rsp), %r15 ; addq $0x10, %rsp