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Expand x64 OperandSize to support 8 and 16-bit operands.

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This is in preparation for refactoring all x64::Inst arms to use OperandSize.

Current uses of OperandSize fall into two categories:
  1. XMM operations which require 32/64 bit operands
  2. Immediates which only care about 64-bit or not.

Adds assertions to existing Inst constructors to check that they are passed valid sizes.
This change also removes the implicit widening of 1 and 2 byte values to 4 bytes. from_bytes() is only used by category 2, so removing this behavior will not change any visible behavior.

Overall this change should be a no-op.
This commit is contained in:
Kasey Carrothers
2021-01-27 21:57:43 -08:00
committed by Andrew Brown
parent 7aecd6dac9
commit b12d41bfe9
3 changed files with 50 additions and 48 deletions
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33
cranelift/codegen/src/isa/x64/inst/emit.rs
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@@ -2063,6 +2063,7 @@ pub(crate) fn emit(
SseOpcode::Maxsd
},
),
_ => unreachable!(),
};
let inst = Inst::xmm_cmp_rm_r(cmp_op, RegMem::reg(*lhs), rhs_dst.to_reg());
@@ -2224,6 +2225,7 @@ pub(crate) fn emit(
let rex = match dst_size {
OperandSize::Size32 => RexFlags::clear_w(),
OperandSize::Size64 => RexFlags::set_w(),
_ => unreachable!(),
};
let (src, dst) = if dst_first {
@@ -2252,6 +2254,7 @@ pub(crate) fn emit(
let rex = match *src_size {
OperandSize::Size32 => RexFlags::clear_w(),
OperandSize::Size64 => RexFlags::set_w(),
_ => unreachable!(),
};
match src_e {
RegMem::Reg { reg: reg_e } => {
@@ -2450,6 +2453,7 @@ pub(crate) fn emit(
let (cast_op, cmp_op, trunc_op) = match src_size {
OperandSize::Size64 => (SseOpcode::Movq, SseOpcode::Ucomisd, SseOpcode::Cvttsd2si),
OperandSize::Size32 => (SseOpcode::Movd, SseOpcode::Ucomiss, SseOpcode::Cvttss2si),
_ => unreachable!(),
};
let done = sink.get_label();
@@ -2542,6 +2546,7 @@ pub(crate) fn emit(
let inst = Inst::imm(OperandSize::Size64, cst.bits(), *tmp_gpr);
inst.emit(sink, info, state);
}
_ => unreachable!(),
}
let inst =
@@ -2622,28 +2627,28 @@ pub(crate) fn emit(
assert_ne!(tmp_xmm, src, "tmp_xmm clobbers src!");
let (sub_op, cast_op, cmp_op, trunc_op) = if *src_size == OperandSize::Size64 {
(
SseOpcode::Subsd,
SseOpcode::Movq,
SseOpcode::Ucomisd,
SseOpcode::Cvttsd2si,
)
} else {
(
let (sub_op, cast_op, cmp_op, trunc_op) = match src_size {
OperandSize::Size32 => (
SseOpcode::Subss,
SseOpcode::Movd,
SseOpcode::Ucomiss,
SseOpcode::Cvttss2si,
)
),
OperandSize::Size64 => (
SseOpcode::Subsd,
SseOpcode::Movq,
SseOpcode::Ucomisd,
SseOpcode::Cvttsd2si,
),
_ => unreachable!(),
};
let done = sink.get_label();
let cst = if *src_size == OperandSize::Size64 {
Ieee64::pow2(dst_size.to_bits() - 1).bits()
} else {
Ieee32::pow2(dst_size.to_bits() - 1).bits() as u64
let cst = match src_size {
OperandSize::Size32 => Ieee32::pow2(dst_size.to_bits() - 1).bits() as u64,
OperandSize::Size64 => Ieee64::pow2(dst_size.to_bits() - 1).bits(),
_ => unreachable!(),
};
let inst = Inst::imm(*src_size, cst, *tmp_gpr);