Cranelift: Implement 'iabs' for scalar types on x86_64 (#5527)

* Implement 'iabs' for scalar types on x86_64

* Small fix

cranelift/filetests/filetests/isa/x64/iabs.clif

@@ -0,0 +1,67 @@
+test compile precise-output
+target x86_64
+
+function %f1(i8) -> i8 {
+block0(v0: i8):
+    v1 = iabs.i8 v0
+    return v1
+}
+
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   negb    %al, %al
+;   cmovsl  %edi, %eax, %eax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+
+function %f2(i16) -> i16 {
+block0(v0: i16):
+    v1 = iabs.i16 v0
+    return v1
+}
+
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   negw    %ax, %ax
+;   cmovsl  %edi, %eax, %eax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+
+function %f3(i32) -> i32 {
+block0(v0: i32):
+    v1 = iabs.i32 v0
+    return v1
+}
+
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   negl    %eax, %eax
+;   cmovsl  %edi, %eax, %eax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+
+function %f3(i64) -> i64 {
+block0(v0: i64):
+    v1 = iabs.i64 v0
+    return v1
+}
+
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   negq    %rax, %rax
+;   cmovsq  %rdi, %rax, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+

cranelift/filetests/filetests/runtests/iabs.clif

@@ -4,7 +4,7 @@ target aarch64
 target s390x
 target riscv64 has_zbb=false
 target riscv64 has_zbb=true
-; x86_64 only supports vector iabs
+target x86_64
 
 function %iabs_i8(i8) -> i8 {
 block0(v0: i8):