aarch64: Implement bint in ISLE (#4319)
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@@ -1109,6 +1109,21 @@
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(rule (lower (has_type ty (cls x)))
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(a64_cls ty x))
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;;;; Rules for `bint` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; Booleans are stored as all-zeroes (0) or all-ones (-1). We AND
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;; out the LSB to give a 0 / 1-valued integer result.
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(rule (lower (has_type $I128 (bint x)))
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(let ((val ValueRegs x)
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(in_lo Reg (value_regs_get val 0))
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(dst_lo Reg (and_imm $I32 in_lo (u64_into_imm_logic $I32 1)))
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(dst_hi Reg (imm $I64 0)))
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(value_regs dst_lo dst_hi)))
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(rule (lower (bint x))
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(and_imm $I32 x (u64_into_imm_logic $I32 1)))
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;;;; Rules for `popcnt` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; The implementation of `popcnt` for scalar types is done by moving the value
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@@ -481,33 +481,7 @@ pub(crate) fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
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}
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}
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Opcode::Bint => {
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let ty = ty.unwrap();
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if ty.is_vector() {
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return Err(CodegenError::Unsupported(format!(
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"Bint: Unsupported type: {:?}",
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ty
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)));
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}
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// Booleans are stored as all-zeroes (0) or all-ones (-1). We AND
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// out the LSB to give a 0 / 1-valued integer result.
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let input = put_input_in_regs(ctx, inputs[0]);
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let output = get_output_reg(ctx, outputs[0]);
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ctx.emit(Inst::AluRRImmLogic {
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alu_op: ALUOp::And,
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size: OperandSize::Size32,
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rd: output.regs()[0],
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rn: input.regs()[0],
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imml: ImmLogic::maybe_from_u64(1, I32).unwrap(),
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});
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if ty_bits(ty) > 64 {
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lower_constant_u64(ctx, output.regs()[1], 0);
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}
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}
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Opcode::Bint => implemented_in_isle(ctx),
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Opcode::Bitcast => {
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let rd = get_output_reg(ctx, outputs[0]).only_reg().unwrap();
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