Generate register class descriptors.

Add a mechanism for defining sub-classes of register classes.
2017-01-20 11:27:56 -08:00
parent ac798c1aed
commit ae926157c2
11 changed files with 152 additions and 39 deletions
--- a/lib/cretonne/meta/isa/intel/registers.py
+++ b/lib/cretonne/meta/isa/intel/registers.py
@@ -38,5 +38,8 @@ FloatRegs = RegBank(
        'SSE floating point registers',
        units=16, prefix='xmm')

-GPR = RegClass('GPR', IntRegs)
-FPR = RegClass('FPR', FloatRegs)
+GPR = RegClass(IntRegs)
+ABCD = GPR[0:4]
+FPR = RegClass(FloatRegs)
+
+RegClass.extract_names(globals())