Add encodings for square root instructions.

cranelift/filetests/isa/intel/binary32-float.cton

@@ -82,6 +82,14 @@ ebb0:
     ; asm: xorps %xmm5, %xmm2
     [-,%xmm2]           v37 = bxor v11, v10                     ; bin: 0f 57 d5
 
+    ; Unary arithmetic.
+
+    ; asm: sqrtss %xmm5, %xmm2
+    [-,%xmm2]           v50 = sqrt v10                          ; bin: f3 0f 51 d5
+    ; asm: sqrtss %xmm2, %xmm5
+    [-,%xmm5]           v51 = sqrt v11                          ; bin: f3 0f 51 ea
+
+
     ; Load/Store
 
     ; asm: movd (%ecx), %xmm5
@@ -192,6 +200,14 @@ ebb0:
     ; asm: xorps %xmm5, %xmm2
     [-,%xmm2]           v37 = bxor v11, v10                     ; bin: 0f 57 d5
 
+    ; Unary arithmetic.
+
+    ; asm: sqrtsd %xmm5, %xmm2
+    [-,%xmm2]           v50 = sqrt v10                          ; bin: f2 0f 51 d5
+    ; asm: sqrtsd %xmm2, %xmm5
+    [-,%xmm5]           v51 = sqrt v11                          ; bin: f2 0f 51 ea
+
+
     ; Load/Store
 
     ; asm: movq (%ecx), %xmm5

cranelift/filetests/isa/intel/binary64-float.cton

@@ -91,6 +91,13 @@ ebb0:
     ; asm: xorps %xmm5, %xmm10
     [-,%xmm10]          v37 = bxor v11, v10                     ; bin: 44 0f 57 d5
 
+    ; Unary arithmetic.
+
+    ; asm: sqrtss %xmm5, %xmm10
+    [-,%xmm10]          v50 = sqrt v10                          ; bin: f3 44 0f 51 d5
+    ; asm: sqrtss %xmm10, %xmm5
+    [-,%xmm5]           v51 = sqrt v11                          ; bin: f3 41 0f 51 ea
+
     ; Load/Store
 
     ; asm: movd (%r14), %xmm5
@@ -216,6 +223,13 @@ ebb0:
     ; asm: xorps %xmm5, %xmm10
     [-,%xmm10]          v37 = bxor v11, v10                     ; bin: 44 0f 57 d5
 
+    ; Unary arithmetic.
+
+    ; asm: sqrtsd %xmm5, %xmm10
+    [-,%xmm10]          v50 = sqrt v10                          ; bin: f2 44 0f 51 d5
+    ; asm: sqrtsd %xmm10, %xmm5
+    [-,%xmm5]           v51 = sqrt v11                          ; bin: f2 41 0f 51 ea
+
     ; Load/Store
 
     ; asm: movq (%r14), %xmm5

cranelift/filetests/wasm/f32-arith.cton

@@ -29,7 +29,12 @@ ebb0(v0: f32):
     return v1
 }
 
-; function %f32_sqrt(f32) -> f32
+function %f32_sqrt(f32) -> f32 {
+ebb0(v0: f32):
+    v1 = sqrt v0
+    return v1
+}
+
 ; function %f32_ceil(f32) -> f32
 ; function %f32_floor(f32) -> f32
 ; function %f32_trunc(f32) -> f32

cranelift/filetests/wasm/f64-arith.cton

@@ -26,7 +26,12 @@ ebb0(v0: f64):
     return v1
 }
 
-; function %f64_sqrt(f64) -> f64
+function %f64_sqrt(f64) -> f64 {
+ebb0(v0: f64):
+    v1 = sqrt v0
+    return v1
+}
+
 ; function %f64_ceil(f64) -> f64
 ; function %f64_floor(f64) -> f64
 ; function %f64_trunc(f64) -> f64

lib/cretonne/meta/isa/intel/encodings.py

@@ -359,6 +359,9 @@ enc_flt(base.fpromote.f64.f32, r.furm, 0xf3, 0x0f, 0x5a)
 # cvtsd2ss
 enc_flt(base.fdemote.f32.f64, r.furm, 0xf2, 0x0f, 0x5a)
 
+# Exact square roots.
+enc_flt(base.sqrt.f32, r.furm, 0xf3, 0x0f, 0x51)
+enc_flt(base.sqrt.f64, r.furm, 0xf2, 0x0f, 0x51)
 
 # Binary arithmetic ops.
 for inst,           opc in [