diff --git a/cranelift/codegen/src/isa/aarch64/abi.rs b/cranelift/codegen/src/isa/aarch64/abi.rs index 0fcc181aa0..e57866c307 100644 --- a/cranelift/codegen/src/isa/aarch64/abi.rs +++ b/cranelift/codegen/src/isa/aarch64/abi.rs @@ -85,7 +85,7 @@ impl ABIMachineSpec for AArch64MachineDeps { params: &[ir::AbiParam], args_or_rets: ArgsOrRets, add_ret_area_ptr: bool, - ) -> CodegenResult<(Vec, i64, Option)> { + ) -> CodegenResult<(ABIArgVec, i64, Option)> { let is_apple_cc = call_conv.extends_apple_aarch64(); // See AArch64 ABI (https://github.com/ARM-software/abi-aa/blob/2021Q1/aapcs64/aapcs64.rst#64parameter-passing), sections 6.4. @@ -105,7 +105,7 @@ impl ABIMachineSpec for AArch64MachineDeps { let mut next_xreg = 0; let mut next_vreg = 0; let mut next_stack: u64 = 0; - let mut ret = vec![]; + let mut ret = ABIArgVec::new(); let (max_per_class_reg_vals, mut remaining_reg_vals) = match args_or_rets { ArgsOrRets::Args => (8, 16), // x0-x7 and v0-v7 diff --git a/cranelift/codegen/src/isa/s390x/abi.rs b/cranelift/codegen/src/isa/s390x/abi.rs index de95a733f2..75ee9557b6 100644 --- a/cranelift/codegen/src/isa/s390x/abi.rs +++ b/cranelift/codegen/src/isa/s390x/abi.rs @@ -224,12 +224,12 @@ impl ABIMachineSpec for S390xMachineDeps { params: &[ir::AbiParam], args_or_rets: ArgsOrRets, add_ret_area_ptr: bool, - ) -> CodegenResult<(Vec, i64, Option)> { + ) -> CodegenResult<(ABIArgVec, i64, Option)> { let mut next_gpr = 0; let mut next_fpr = 0; let mut next_vr = 0; let mut next_stack: u64 = 0; - let mut ret = vec![]; + let mut ret = ABIArgVec::new(); if args_or_rets == ArgsOrRets::Args { next_stack = REG_SAVE_AREA_SIZE as u64; diff --git a/cranelift/codegen/src/isa/x64/abi.rs b/cranelift/codegen/src/isa/x64/abi.rs index 616ea12b45..9202e2c82f 100644 --- a/cranelift/codegen/src/isa/x64/abi.rs +++ b/cranelift/codegen/src/isa/x64/abi.rs @@ -47,14 +47,14 @@ impl ABIMachineSpec for X64ABIMachineSpec { params: &[ir::AbiParam], args_or_rets: ArgsOrRets, add_ret_area_ptr: bool, - ) -> CodegenResult<(Vec, i64, Option)> { + ) -> CodegenResult<(ABIArgVec, i64, Option)> { let is_fastcall = call_conv.extends_windows_fastcall(); let mut next_gpr = 0; let mut next_vreg = 0; let mut next_stack: u64 = 0; let mut next_param_idx = 0; // Fastcall cares about overall param index - let mut ret = vec![]; + let mut ret = ABIArgVec::new(); if args_or_rets == ArgsOrRets::Args && is_fastcall { // Fastcall always reserves 32 bytes of shadow space corresponding to diff --git a/cranelift/codegen/src/machinst/abi_impl.rs b/cranelift/codegen/src/machinst/abi_impl.rs index 203efe78cd..dd2e860386 100644 --- a/cranelift/codegen/src/machinst/abi_impl.rs +++ b/cranelift/codegen/src/machinst/abi_impl.rs @@ -310,7 +310,7 @@ pub trait ABIMachineSpec { params: &[ir::AbiParam], args_or_rets: ArgsOrRets, add_ret_area_ptr: bool, - ) -> CodegenResult<(Vec, i64, Option)>; + ) -> CodegenResult<(ABIArgVec, i64, Option)>; /// Returns the offset from FP to the argument area, i.e., jumping over the saved FP, return /// address, and maybe other standard elements depending on ABI (e.g. Wasm TLS reg). @@ -499,15 +499,18 @@ pub trait ABIMachineSpec { ) -> ir::ArgumentExtension; } +// A vector of `ABIArg`s with inline capacity, since they are typically small. +pub type ABIArgVec = SmallVec<[ABIArg; 6]>; + /// ABI information shared between body (callee) and caller. #[derive(Clone)] pub struct ABISig { /// Argument locations (regs or stack slots). Stack offsets are relative to /// SP on entry to function. - args: Vec, + args: ABIArgVec, /// Return-value locations. Stack offsets are relative to the return-area /// pointer. - rets: Vec, + rets: ABIArgVec, /// Space on stack used to store arguments. sized_stack_arg_space: i64, /// Space on stack used to store return values.