Hook up the handling of tied register constraints.

Tests are forthcoming, we need to implement Intel ABI lowering first.

lib/cretonne/src/regalloc/liverange.rs

@@ -399,7 +399,7 @@ impl LiveRange {
         }
     }
 
-    /// Check if this live range reaches a use at `inst` in `ebb`.
+    /// Check if this live range reaches a use at `user` in `ebb`.
     pub fn reaches_use<PO>(&self, user: Inst, ebb: Ebb, order: &PO) -> bool
         where PO: ProgramOrder
     {
@@ -415,6 +415,13 @@ impl LiveRange {
             None => false,
         }
     }
+
+    /// Check if this live range is killed at `user` in `ebb`.
+    pub fn killed_at<PO>(&self, user: Inst, ebb: Ebb, order: &PO) -> bool
+        where PO: ProgramOrder
+    {
+        self.def_local_end() == user.into() || self.livein_local_end(ebb, order) == Some(user)
+    }
 }
 
 /// Allow a `LiveRange` to be stored in a `SparseMap` indexed by values.