Add an avoid_div_traps setting.

This enables code generation that never causes a SIGFPE signal to be
raised from a division instruction. Instead, division and remainder
calculations are protected by explicit traps.

lib/cretonne/src/settings.rs

@@ -360,6 +360,7 @@ mod tests {
                     is_64bit = false\n\
                     is_pic = false\n\
                     return_at_end = false\n\
+                    avoid_div_traps = false\n\
                     is_compressed = false\n\
                     enable_float = true\n\
                     enable_simd = true\n\