Add an avoid_div_traps setting.
This enables code generation that never causes a SIGFPE signal to be raised from a division instruction. Instead, division and remainder calculations are protected by explicit traps.
This commit is contained in:
@@ -1,9 +1,9 @@
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//! Encoding tables for Intel ISAs.
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use bitset::BitSet;
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use cursor::{Cursor, FuncCursor};
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use flowgraph::ControlFlowGraph;
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use ir::{self, InstBuilder};
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use ir::condcodes::IntCC;
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use isa::constraints::*;
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use isa::enc_tables::*;
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use isa::encoding::RecipeSizing;
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@@ -14,55 +14,87 @@ use super::registers::*;
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include!(concat!(env!("OUT_DIR"), "/encoding-intel.rs"));
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include!(concat!(env!("OUT_DIR"), "/legalize-intel.rs"));
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/// Expand the `srem` instruction using `x86_sdivmodx`.
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fn expand_srem(
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/// Expand the `sdiv` and `srem` instructions using `x86_sdivmodx`.
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fn expand_sdivrem(
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inst: ir::Inst,
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func: &mut ir::Function,
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cfg: &mut ControlFlowGraph,
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_isa: &isa::TargetIsa,
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isa: &isa::TargetIsa,
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) {
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use ir::condcodes::IntCC;
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let (x, y) = match func.dfg[inst] {
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let (x, y, is_srem) = match func.dfg[inst] {
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ir::InstructionData::Binary {
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opcode: ir::Opcode::Sdiv,
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args,
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} => (args[0], args[1], false),
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ir::InstructionData::Binary {
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opcode: ir::Opcode::Srem,
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args,
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} => (args[0], args[1]),
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_ => panic!("Need srem: {}", func.dfg.display_inst(inst, None)),
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} => (args[0], args[1], true),
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_ => panic!("Need sdiv/srem: {}", func.dfg.display_inst(inst, None)),
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};
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let avoid_div_traps = isa.flags().avoid_div_traps();
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let old_ebb = func.layout.pp_ebb(inst);
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// EBB handling the -1 divisor case.
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let minus_one = func.dfg.make_ebb();
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// Final EBB with one argument representing the final result value.
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let done = func.dfg.make_ebb();
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// Move the `inst` result value onto the `done` EBB.
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let result = func.dfg.first_result(inst);
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let ty = func.dfg.value_type(result);
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func.dfg.clear_results(inst);
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func.dfg.attach_ebb_param(done, result);
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let mut pos = FuncCursor::new(func).at_inst(inst);
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pos.use_srcloc(inst);
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pos.func.dfg.clear_results(inst);
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// If we can tolerate native division traps, sdiv doesn't need branching.
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if !avoid_div_traps && !is_srem {
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let xhi = pos.ins().sshr_imm(x, i64::from(ty.lane_bits()) - 1);
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pos.ins().with_result(result).x86_sdivmodx(x, xhi, y);
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pos.remove_inst();
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return;
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}
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// EBB handling the -1 divisor case.
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let minus_one = pos.func.dfg.make_ebb();
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// Final EBB with one argument representing the final result value.
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let done = pos.func.dfg.make_ebb();
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// Move the `inst` result value onto the `done` EBB.
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pos.func.dfg.attach_ebb_param(done, result);
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// Start by checking for a -1 divisor which needs to be handled specially.
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let is_m1 = pos.ins().icmp_imm(IntCC::Equal, y, -1);
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pos.ins().brnz(is_m1, minus_one, &[]);
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let is_m1 = pos.ins().ifcmp_imm(y, -1);
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pos.ins().brif(IntCC::Equal, is_m1, minus_one, &[]);
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// Put in an explicit division-by-zero trap if the environment requires it.
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if avoid_div_traps {
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pos.ins().trapz(y, ir::TrapCode::IntegerDivisionByZero);
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}
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// Now it is safe to execute the `x86_sdivmodx` instruction which will still trap on division
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// by zero.
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let xhi = pos.ins().sshr_imm(x, i64::from(ty.lane_bits()) - 1);
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let (_qout, rem) = pos.ins().x86_sdivmodx(x, xhi, y);
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pos.ins().jump(done, &[rem]);
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let (quot, rem) = pos.ins().x86_sdivmodx(x, xhi, y);
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let divres = if is_srem { rem } else { quot };
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pos.ins().jump(done, &[divres]);
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// Now deal with the -1 divisor which always yields a 0 remainder.
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// Now deal with the -1 divisor case.
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pos.insert_ebb(minus_one);
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let zero = pos.ins().iconst(ty, 0);
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let m1_result = if is_srem {
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// x % -1 = 0.
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pos.ins().iconst(ty, 0)
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} else {
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// Explicitly check for overflow: Trap when x == INT_MIN.
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debug_assert!(avoid_div_traps, "Native trapping divide handled above");
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let f = pos.ins().ifcmp_imm(x, -1 << (ty.lane_bits() - 1));
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pos.ins().trapif(
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IntCC::Equal,
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f,
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ir::TrapCode::IntegerOverflow,
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);
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// x / -1 = -x.
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pos.ins().irsub_imm(x, 0)
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};
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// Recycle the original instruction as a jump.
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pos.func.dfg.replace(inst).jump(done, &[zero]);
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pos.func.dfg.replace(inst).jump(done, &[m1_result]);
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// Finally insert a label for the completion.
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pos.next_inst();
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@@ -73,6 +105,49 @@ fn expand_srem(
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cfg.recompute_ebb(pos.func, done);
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}
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/// Expand the `udiv` and `urem` instructions using `x86_udivmodx`.
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fn expand_udivrem(
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inst: ir::Inst,
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func: &mut ir::Function,
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_cfg: &mut ControlFlowGraph,
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isa: &isa::TargetIsa,
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) {
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let (x, y, is_urem) = match func.dfg[inst] {
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ir::InstructionData::Binary {
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opcode: ir::Opcode::Udiv,
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args,
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} => (args[0], args[1], false),
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ir::InstructionData::Binary {
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opcode: ir::Opcode::Urem,
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args,
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} => (args[0], args[1], true),
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_ => panic!("Need udiv/urem: {}", func.dfg.display_inst(inst, None)),
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};
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let avoid_div_traps = isa.flags().avoid_div_traps();
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let result = func.dfg.first_result(inst);
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let ty = func.dfg.value_type(result);
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let mut pos = FuncCursor::new(func).at_inst(inst);
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pos.use_srcloc(inst);
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pos.func.dfg.clear_results(inst);
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// Put in an explicit division-by-zero trap if the environment requires it.
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if avoid_div_traps {
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pos.ins().trapz(y, ir::TrapCode::IntegerDivisionByZero);
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}
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// Now it is safe to execute the `x86_udivmodx` instruction.
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let xhi = pos.ins().iconst(ty, 0);
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let reuse = if is_urem {
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[None, Some(result)]
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} else {
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[Some(result), None]
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};
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pos.ins().with_results(reuse).x86_udivmodx(x, xhi, y);
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pos.remove_inst();
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}
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/// Expand the `fmin` and `fmax` instructions using the Intel `x86_fmin` and `x86_fmax`
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/// instructions.
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fn expand_minmax(
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