machinst: make get_output_reg target independent;
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@@ -106,26 +106,6 @@ pub(crate) enum ResultRegImmShift {
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ImmShift(ImmShift),
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}
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//============================================================================
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// Instruction input "slots".
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//
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// We use these types to refer to operand numbers, and result numbers, together
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// with the associated instruction, in a type-safe way.
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/// Identifier for a particular input of an instruction.
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub(crate) struct InsnInput {
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pub(crate) insn: IRInst,
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pub(crate) input: usize,
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}
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/// Identifier for a particular output of an instruction.
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub(crate) struct InsnOutput {
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pub(crate) insn: IRInst,
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pub(crate) output: usize,
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}
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//============================================================================
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// Lowering: convert instruction inputs to forms that we can use.
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@@ -191,11 +171,6 @@ impl NarrowValueMode {
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}
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}
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/// Allocate a register for an instruction output and return it.
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pub(crate) fn get_output_reg<C: LowerCtx<I = Inst>>(ctx: &mut C, out: InsnOutput) -> Writable<Reg> {
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ctx.get_output(out.insn, out.output)
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}
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/// Lower an instruction input to a reg.
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///
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/// The given register will be extended appropriately, according to
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@@ -110,20 +110,6 @@ fn ldst_offset(data: &InstructionData) -> Option<i32> {
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}
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}
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/// Identifier for a particular input of an instruction.
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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struct InsnInput {
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insn: IRInst,
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input: usize,
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}
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/// Identifier for a particular output of an instruction.
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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struct InsnOutput {
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insn: IRInst,
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output: usize,
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}
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/// Returns whether the given specified `input` is a result produced by an instruction with Opcode
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/// `op`.
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// TODO investigate failures with checking against the result index.
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@@ -256,10 +242,6 @@ fn input_to_reg_mem_imm(ctx: Ctx, spec: InsnInput) -> RegMemImm {
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}
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}
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fn get_output_reg(ctx: Ctx, spec: InsnOutput) -> Writable<Reg> {
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ctx.get_output(spec.insn, spec.output)
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}
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fn emit_cmp(ctx: Ctx, insn: IRInst) {
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let ty = ctx.input_ty(insn, 0);
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@@ -1,6 +1,8 @@
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//! Miscellaneous helpers for machine backends.
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use super::{InsnOutput, LowerCtx, VCodeInst};
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use crate::ir::Type;
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use regalloc::{Reg, Writable};
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/// Returns the size (in bits) of a given type.
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pub fn ty_bits(ty: Type) -> usize {
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@@ -16,3 +18,11 @@ pub(crate) fn ty_has_int_representation(ty: Type) -> bool {
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pub(crate) fn ty_has_float_or_vec_representation(ty: Type) -> bool {
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ty.is_vector() || ty.is_float()
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}
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/// Allocate a register for an instruction output and return it.
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pub(crate) fn get_output_reg<I: VCodeInst, C: LowerCtx<I = I>>(
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ctx: &mut C,
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spec: InsnOutput,
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) -> Writable<Reg> {
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ctx.get_output(spec.insn, spec.output)
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}
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@@ -1,6 +1,29 @@
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//! A place to park MachInst::Inst fragments which are common across multiple architectures.
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use crate::ir;
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use crate::ir::{self, Inst as IRInst};
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//============================================================================
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// Instruction input "slots".
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//
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// We use these types to refer to operand numbers, and result numbers, together
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// with the associated instruction, in a type-safe way.
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/// Identifier for a particular input of an instruction.
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub(crate) struct InsnInput {
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pub(crate) insn: IRInst,
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pub(crate) input: usize,
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}
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/// Identifier for a particular output of an instruction.
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub(crate) struct InsnOutput {
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pub(crate) insn: IRInst,
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pub(crate) output: usize,
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}
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//============================================================================
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// Atomic instructions.
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/// Atomic memory update operations. As of 21 Aug 2020 these are used for the aarch64 and x64
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/// targets.
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