machinst: make get_output_reg target independent;
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@@ -1,6 +1,8 @@
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//! Miscellaneous helpers for machine backends.
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use super::{InsnOutput, LowerCtx, VCodeInst};
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use crate::ir::Type;
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use regalloc::{Reg, Writable};
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/// Returns the size (in bits) of a given type.
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pub fn ty_bits(ty: Type) -> usize {
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@@ -16,3 +18,11 @@ pub(crate) fn ty_has_int_representation(ty: Type) -> bool {
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pub(crate) fn ty_has_float_or_vec_representation(ty: Type) -> bool {
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ty.is_vector() || ty.is_float()
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}
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/// Allocate a register for an instruction output and return it.
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pub(crate) fn get_output_reg<I: VCodeInst, C: LowerCtx<I = I>>(
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ctx: &mut C,
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spec: InsnOutput,
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) -> Writable<Reg> {
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ctx.get_output(spec.insn, spec.output)
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}
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