machinst: make get_output_reg target independent;

This commit is contained in:
Benjamin Bouvier
2020-09-08 15:44:01 +02:00
parent 6a3c4fb54e
commit a835c247c0
4 changed files with 34 additions and 44 deletions

View File

@@ -1,6 +1,8 @@
//! Miscellaneous helpers for machine backends.
use super::{InsnOutput, LowerCtx, VCodeInst};
use crate::ir::Type;
use regalloc::{Reg, Writable};
/// Returns the size (in bits) of a given type.
pub fn ty_bits(ty: Type) -> usize {
@@ -16,3 +18,11 @@ pub(crate) fn ty_has_int_representation(ty: Type) -> bool {
pub(crate) fn ty_has_float_or_vec_representation(ty: Type) -> bool {
ty.is_vector() || ty.is_float()
}
/// Allocate a register for an instruction output and return it.
pub(crate) fn get_output_reg<I: VCodeInst, C: LowerCtx<I = I>>(
ctx: &mut C,
spec: InsnOutput,
) -> Writable<Reg> {
ctx.get_output(spec.insn, spec.output)
}