machinst: make get_output_reg target independent;

cranelift/codegen/src/machinst/helpers.rs

@@ -1,6 +1,8 @@
 //! Miscellaneous helpers for machine backends.
 
+use super::{InsnOutput, LowerCtx, VCodeInst};
 use crate::ir::Type;
+use regalloc::{Reg, Writable};
 
 /// Returns the size (in bits) of a given type.
 pub fn ty_bits(ty: Type) -> usize {
@@ -16,3 +18,11 @@ pub(crate) fn ty_has_int_representation(ty: Type) -> bool {
 pub(crate) fn ty_has_float_or_vec_representation(ty: Type) -> bool {
     ty.is_vector() || ty.is_float()
 }
+
+/// Allocate a register for an instruction output and return it.
+pub(crate) fn get_output_reg<I: VCodeInst, C: LowerCtx<I = I>>(
+    ctx: &mut C,
+    spec: InsnOutput,
+) -> Writable<Reg> {
+    ctx.get_output(spec.insn, spec.output)
+}

cranelift/codegen/src/machinst/inst_common.rs

@@ -1,6 +1,29 @@
 //! A place to park MachInst::Inst fragments which are common across multiple architectures.
 
-use crate::ir;
+use crate::ir::{self, Inst as IRInst};
+
+//============================================================================
+// Instruction input "slots".
+//
+// We use these types to refer to operand numbers, and result numbers, together
+// with the associated instruction, in a type-safe way.
+
+/// Identifier for a particular input of an instruction.
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub(crate) struct InsnInput {
+    pub(crate) insn: IRInst,
+    pub(crate) input: usize,
+}
+
+/// Identifier for a particular output of an instruction.
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub(crate) struct InsnOutput {
+    pub(crate) insn: IRInst,
+    pub(crate) output: usize,
+}
+
+//============================================================================
+// Atomic instructions.
 
 /// Atomic memory update operations.  As of 21 Aug 2020 these are used for the aarch64 and x64
 /// targets.