AArch64: port misc ops to ISLE. (#4796)

* Add some precise-output compile tests for aarch64.

* AArch64: port misc ops to ISLE.

- get_pinned_reg / set_pinned_reg
- bitcast
- stack_addr
- extractlane
- insertlane
- vhigh_bits
- iadd_ifcout
- fcvt_low_from_sint

cranelift/codegen/src/machinst/isle.rs

@@ -371,6 +371,15 @@ macro_rules! isle_prelude_methods {
             ty.is_int().then(|| ty)
         }
 
+        #[inline]
+        fn ty_int_bool(&mut self, ty: Type) -> Option<Type> {
+            if ty.is_int() || ty.is_bool() {
+                Some(ty)
+            } else {
+                None
+            }
+        }
+
         #[inline]
         fn ty_scalar_float(&mut self, ty: Type) -> Option<Type> {
             match ty {
@@ -379,6 +388,15 @@ macro_rules! isle_prelude_methods {
             }
         }
 
+        #[inline]
+        fn ty_float_or_vec(&mut self, ty: Type) -> Option<Type> {
+            match ty {
+                F32 | F64 => Some(ty),
+                ty if ty.is_vector() => Some(ty),
+                _ => None,
+            }
+        }
+
         #[inline]
         fn ty_vec64(&mut self, ty: Type) -> Option<Type> {
             if ty.is_vector() && ty.bits() == 64 {