Remove legacy x86_64 backend tests

cranelift/filetests/filetests/isa/x64/bextend.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst
+target x86_64
 
 function %f0(b8) -> b64 {
 block0(v0: b8):

cranelift/filetests/filetests/runtests/alias.clif

@@ -2,7 +2,7 @@ test interpret
 test run
 target aarch64
 target s390x
-target x86_64 machinst
+target x86_64
 
 function %alias(i8) -> i8 {
 block0(v0: i8):

cranelift/filetests/filetests/runtests/arithmetic.clif

@@ -2,7 +2,7 @@ test interpret
 test run
 target aarch64
 target s390x
-target x86_64 machinst
+target x86_64
 
 function %add_i64(i64, i64) -> i64 {
 block0(v0: i64,v1: i64):

cranelift/filetests/filetests/runtests/atomic-rmw-2.clif

@@ -1,7 +1,7 @@
 test run
 target aarch64
 target aarch64 has_lse
-target x86_64 machinst
+target x86_64
 ; TODO: Merge this with atomic-rmw.clif when s390x supports it
 
 

cranelift/filetests/filetests/runtests/atomic-rmw.clif

@@ -1,7 +1,7 @@
 test run
 target aarch64
 target aarch64 has_lse
-target x86_64 machinst
+target x86_64
 target s390x
 
 ; We can't test that these instructions are right regarding atomicity, but we can

cranelift/filetests/filetests/runtests/bint.clif

@@ -1,6 +1,6 @@
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %bint_b8_i16_true() -> i16 {
 block0:

cranelift/filetests/filetests/runtests/bitops.clif

@@ -2,8 +2,7 @@ test run
 target aarch64
 target arm
 target s390x
-; target x86_64 machinst TODO: Not yet implemented on x86_64
+; target x86_64 TODO: Not yet implemented on x86_64
-target x86_64 legacy
 
 
 function %bnot_band() -> b1 {

cranelift/filetests/filetests/runtests/br.clif

@@ -3,8 +3,7 @@ test run
 target aarch64
 target arm
 target s390x
-target x86_64 machinst
+target x86_64
-target x86_64 legacy
 
 function %jump() -> b1 {
 block0:

cranelift/filetests/filetests/runtests/br_icmp.clif

@@ -2,7 +2,7 @@ test interpret
 test run
 target aarch64
 target s390x
-target x86_64 machinst
+target x86_64
 
 
 function %bricmp_eq_i64(i64, i64) -> b1 {

cranelift/filetests/filetests/runtests/br_icmp_overflow.clif

@@ -1,7 +1,7 @@
 test interpret
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 
 ; TODO: Merge this with the main br_icmp file when s390x supports overflows.
 ; See: https://github.com/bytecodealliance/wasmtime/issues/3060

cranelift/filetests/filetests/runtests/br_table.clif

@@ -1,7 +1,7 @@
 test interpret
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 target s390x
 
 

cranelift/filetests/filetests/runtests/const.clif

@@ -2,8 +2,7 @@ test run
 target aarch64
 target arm
 target s390x
-target x86_64 machinst
+target x86_64
-target x86_64 legacy
 
 function %i8_iconst_0() -> i8 {
 block0:

cranelift/filetests/filetests/runtests/div-checks.clif

@@ -3,7 +3,7 @@ target aarch64
 target arm
 target s390x
 set avoid_div_traps=false
-target x86_64 machinst
+target x86_64
 
 function %i8(i8, i8) -> i8 {
 block0(v0: i8, v1: i8):

cranelift/filetests/filetests/runtests/extend.clif

@@ -2,8 +2,7 @@ test run
 target aarch64
 target arm
 target s390x
-; target x86_64 machinst TODO: Not yet implemented on x86_64
+; target x86_64 TODO: Not yet implemented on x86_64
-target i686 legacy
 
 function %uextend() -> b1 {
 block0:

cranelift/filetests/filetests/runtests/fmin-max-pseudo-vector.clif

@@ -2,7 +2,7 @@ test run
 ; target s390x TODO: Not yet implemented on s390x
 set enable_simd
 target aarch64
-target x86_64 machinst skylake
+target x86_64 skylake
 
 function %fmin_pseudo_f32x4(f32x4, f32x4) -> f32x4 {
 block0(v0:f32x4, v1:f32x4):

cranelift/filetests/filetests/runtests/fmin-max-pseudo.clif

@@ -2,7 +2,7 @@ test run
 ; target s390x TODO: Not yet implemented on s390x
 target aarch64
 set enable_simd
-target x86_64 machinst skylake
+target x86_64 skylake
 
 function %fmin_pseudo_f32(f32, f32) -> f32 {
 block0(v0:f32, v1:f32):

cranelift/filetests/filetests/runtests/heap.clif

@@ -1,5 +1,5 @@
 test run
-target x86_64 machinst
+target x86_64
 target s390x
 target aarch64
 

cranelift/filetests/filetests/runtests/i128-arithmetic-legacy.clif

@@ -1,20 +0,0 @@
-test run
-target x86_64 legacy haswell
-
-function %test_imul_i128() -> b1 {
-block0:
-    v11 = iconst.i64 0xf2347ac4503f1e24
-    v12 = iconst.i64 0x0098fe985354ab06
-    v1 = iconcat v11, v12
-    v21 = iconst.i64 0xf606ba453589ef89
-    v22 = iconst.i64 0x042e1f3054ca7432
-    v2 = iconcat v21, v22
-    v31 = iconst.i64 0xbe2044b2742ebd44
-    v32 = iconst.i64 0xa363ce3b6849f307
-    v3 = iconcat v31, v32
-    v4 = imul v1, v2
-    v5 = icmp eq v3, v4
-    return v5
-}
-
-; run

cranelift/filetests/filetests/runtests/i128-arithmetic.clif

@@ -2,7 +2,7 @@ test interpret
 test run
 set enable_llvm_abi_extensions=true
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %add_i128(i128, i128) -> i128 {
 block0(v0: i128,v1: i128):

cranelift/filetests/filetests/runtests/i128-bint.clif

@@ -1,7 +1,7 @@
 test run
 set enable_llvm_abi_extensions=true
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %bint_b8_i128() -> i128 {
 block0:

cranelift/filetests/filetests/runtests/i128-bitops-count.clif

@@ -1,7 +1,7 @@
 test run
 set enable_llvm_abi_extensions=true
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %ctz_i128(i128) -> i128 {
 block0(v0: i128):

cranelift/filetests/filetests/runtests/i128-bitops.clif

@@ -1,7 +1,7 @@
 test run
 set enable_llvm_abi_extensions=true
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %bnot_i128(i128) -> i128 {
 block0(v0: i128):

cranelift/filetests/filetests/runtests/i128-bitrev.clif

@@ -1,8 +1,7 @@
 test run
 set enable_llvm_abi_extensions=true
 target aarch64
-target x86_64 machinst
+target x86_64
-target x86_64 legacy
 
 function %reverse_bits_zero() -> b1 {
 block0:

cranelift/filetests/filetests/runtests/i128-br.clif

@@ -1,8 +1,7 @@
 test run
 set enable_llvm_abi_extensions=true
 target aarch64
-target x86_64 machinst
+target x86_64
-target x86_64 legacy
 
 
 function %i128_brz(i128) -> b1 {

cranelift/filetests/filetests/runtests/i128-concat-split.clif

@@ -1,7 +1,7 @@
 test interpret
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %iconcat_isplit(i64, i64) -> i64, i64 {
 block0(v0: i64, v1: i64):

cranelift/filetests/filetests/runtests/i128-const.clif

@@ -3,7 +3,7 @@ test run
 set enable_llvm_abi_extensions=true
 target aarch64
 ; target s390x TODO: Not yet implemented on s390x
-target x86_64 machinst
+target x86_64
 
 function %i128_const_0() -> i128 {
 block0:

cranelift/filetests/filetests/runtests/i128-extend-2.clif

@@ -1,64 +0,0 @@
-test run
-set enable_llvm_abi_extensions=true
-target aarch64
-target x86_64 machinst
-; TODO:  Merge this file with i128-extend once the x86 legacy backend is removed
-
-function %i128_uextend_i32(i32) -> i128 {
-block0(v0: i32):
-    v1 = uextend.i128 v0
-    return v1
-}
-; run: %i128_uextend_i32(0) == 0
-; run: %i128_uextend_i32(-1) == 0x00000000_00000000_00000000_ffffffff
-; run: %i128_uextend_i32(0xffff_eeee) == 0x00000000_00000000_00000000_ffffeeee
-
-function %i128_sextend_i32(i32) -> i128 {
-block0(v0: i32):
-    v1 = sextend.i128 v0
-    return v1
-}
-; run: %i128_sextend_i32(0) == 0
-; run: %i128_sextend_i32(-1) == -1
-; run: %i128_sextend_i32(0x7fff_ffff) == 0x00000000_00000000_00000000_7fffffff
-; run: %i128_sextend_i32(0xffff_eeee) == 0xffffffff_ffffffff_ffffffff_ffff_eeee
-
-
-function %i128_uextend_i16(i16) -> i128 {
-block0(v0: i16):
-    v1 = uextend.i128 v0
-    return v1
-}
-; run: %i128_uextend_i16(0) == 0
-; run: %i128_uextend_i16(-1) == 0x00000000_00000000_00000000_0000ffff
-; run: %i128_uextend_i16(0xffee) == 0x00000000_00000000_00000000_0000ffee
-
-function %i128_sextend_i16(i16) -> i128 {
-block0(v0: i16):
-    v1 = sextend.i128 v0
-    return v1
-}
-; run: %i128_sextend_i16(0) == 0
-; run: %i128_sextend_i16(-1) == -1
-; run: %i128_sextend_i16(0x7fff) == 0x00000000_00000000_00000000_00007fff
-; run: %i128_sextend_i16(0xffee) == 0xffffffff_ffffffff_ffffffff_ffffffee
-
-
-function %i128_uextend_i8(i8) -> i128 {
-block0(v0: i8):
-    v1 = uextend.i128 v0
-    return v1
-}
-; run: %i128_uextend_i8(0) == 0
-; run: %i128_uextend_i8(-1) == 0x00000000_00000000_00000000_000000ff
-; run: %i128_uextend_i8(0xfe) == 0x00000000_00000000_00000000_000000fe
-
-function %i128_sextend_i8(i8) -> i128 {
-block0(v0: i8):
-    v1 = sextend.i128 v0
-    return v1
-}
-; run: %i128_sextend_i8(0) == 0
-; run: %i128_sextend_i8(-1) == -1
-; run: %i128_sextend_i8(0x7f) == 0x00000000_00000000_00000000_0000007f
-; run: %i128_sextend_i8(0xfe) == 0xffffffff_ffffffff_ffffffff_fffffffe

cranelift/filetests/filetests/runtests/i128-extend.clif

@@ -1,8 +1,7 @@
 test run
 set enable_llvm_abi_extensions=true
 target aarch64
-target x86_64 machinst
+target x86_64
-target x86_64 legacy
 
 function %i128_uextend_i64(i64) -> i128 {
 block0(v0: i64):
@@ -22,3 +21,62 @@ block0(v0: i64):
 ; run: %i128_sextend_i64(-1) == -1
 ; run: %i128_sextend_i64(0x7fff_ffff_ffff_ffff) == 0x00000000_00000000_7fffffffffffffff
 ; run: %i128_sextend_i64(0xffff_ffff_eeee_0000) == 0xffffffff_ffffffff_ffffffff_eeee0000
+
+function %i128_uextend_i32(i32) -> i128 {
+block0(v0: i32):
+    v1 = uextend.i128 v0
+    return v1
+}
+; run: %i128_uextend_i32(0) == 0
+; run: %i128_uextend_i32(-1) == 0x00000000_00000000_00000000_ffffffff
+; run: %i128_uextend_i32(0xffff_eeee) == 0x00000000_00000000_00000000_ffffeeee
+
+function %i128_sextend_i32(i32) -> i128 {
+block0(v0: i32):
+    v1 = sextend.i128 v0
+    return v1
+}
+; run: %i128_sextend_i32(0) == 0
+; run: %i128_sextend_i32(-1) == -1
+; run: %i128_sextend_i32(0x7fff_ffff) == 0x00000000_00000000_00000000_7fffffff
+; run: %i128_sextend_i32(0xffff_eeee) == 0xffffffff_ffffffff_ffffffff_ffff_eeee
+
+
+function %i128_uextend_i16(i16) -> i128 {
+block0(v0: i16):
+    v1 = uextend.i128 v0
+    return v1
+}
+; run: %i128_uextend_i16(0) == 0
+; run: %i128_uextend_i16(-1) == 0x00000000_00000000_00000000_0000ffff
+; run: %i128_uextend_i16(0xffee) == 0x00000000_00000000_00000000_0000ffee
+
+function %i128_sextend_i16(i16) -> i128 {
+block0(v0: i16):
+    v1 = sextend.i128 v0
+    return v1
+}
+; run: %i128_sextend_i16(0) == 0
+; run: %i128_sextend_i16(-1) == -1
+; run: %i128_sextend_i16(0x7fff) == 0x00000000_00000000_00000000_00007fff
+; run: %i128_sextend_i16(0xffee) == 0xffffffff_ffffffff_ffffffff_ffffffee
+
+
+function %i128_uextend_i8(i8) -> i128 {
+block0(v0: i8):
+    v1 = uextend.i128 v0
+    return v1
+}
+; run: %i128_uextend_i8(0) == 0
+; run: %i128_uextend_i8(-1) == 0x00000000_00000000_00000000_000000ff
+; run: %i128_uextend_i8(0xfe) == 0x00000000_00000000_00000000_000000fe
+
+function %i128_sextend_i8(i8) -> i128 {
+block0(v0: i8):
+    v1 = sextend.i128 v0
+    return v1
+}
+; run: %i128_sextend_i8(0) == 0
+; run: %i128_sextend_i8(-1) == -1
+; run: %i128_sextend_i8(0x7f) == 0x00000000_00000000_00000000_0000007f
+; run: %i128_sextend_i8(0xfe) == 0xffffffff_ffffffff_ffffffff_fffffffe

cranelift/filetests/filetests/runtests/i128-icmp.clif

@@ -2,7 +2,7 @@ test interpret
 test run
 set enable_llvm_abi_extensions=true
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %icmp_eq_i128(i128, i128) -> b1 {
 block0(v0: i128, v1: i128):

cranelift/filetests/filetests/runtests/i128-load-store.clif

@@ -1,6 +1,6 @@
 test run
 set enable_llvm_abi_extensions=true
-target x86_64 machinst
+target x86_64
 target aarch64
 
 function %i128_stack_store_load(i128) -> b1 {

cranelift/filetests/filetests/runtests/i128-reduce.clif

@@ -1,7 +1,7 @@
 test run
 set enable_llvm_abi_extensions=true
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %ireduce_128_64(i128) -> i64 {
 block0(v0: i128):

cranelift/filetests/filetests/runtests/i128-rotate.clif

@@ -1,7 +1,7 @@
 test run
 set enable_llvm_abi_extensions=true
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %rotl(i128, i8) -> i128 {
 block0(v0: i128, v1: i8):

cranelift/filetests/filetests/runtests/i128-select.clif

@@ -1,7 +1,7 @@
 test run
 set enable_llvm_abi_extensions=true
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %i128_select(b1, i128, i128) -> i128 {
 block0(v0: b1, v1: i128, v2: i128):

cranelift/filetests/filetests/runtests/i128-shifts.clif

@@ -1,7 +1,7 @@
 test run
 set enable_llvm_abi_extensions=true
 target aarch64
-target x86_64 machinst
+target x86_64
 
 
 function %ishl_i128_i128(i128, i8) -> i128 {

cranelift/filetests/filetests/runtests/icmp-eq.clif

@@ -1,7 +1,7 @@
 test interpret
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %icmp_eq_i8(i8, i8) -> b1 {
 block0(v0: i8, v1: i8):

cranelift/filetests/filetests/runtests/icmp-ne.clif

@@ -1,7 +1,7 @@
 test interpret
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %icmp_ne_i8(i8, i8) -> b1 {
 block0(v0: i8, v1: i8):

cranelift/filetests/filetests/runtests/icmp-nof.clif

@@ -1,6 +1,6 @@
 test interpret
 test run
-target x86_64 machinst
+target x86_64
 
 function %icmp_nof_i8(i8, i8) -> b1 {
 block0(v0: i8, v1: i8):

cranelift/filetests/filetests/runtests/icmp-of.clif

@@ -1,6 +1,6 @@
 test interpret
 test run
-target x86_64 machinst
+target x86_64
 
 function %icmp_of_i8(i8, i8) -> b1 {
 block0(v0: i8, v1: i8):

cranelift/filetests/filetests/runtests/icmp-sge.clif

@@ -1,7 +1,7 @@
 test interpret
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 
 
 function %icmp_sge_i8(i8, i8) -> b1 {

cranelift/filetests/filetests/runtests/icmp-sgt.clif

@@ -1,7 +1,7 @@
 test interpret
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 
 
 function %icmp_sgt_i8(i8, i8) -> b1 {

cranelift/filetests/filetests/runtests/icmp-sle.clif

@@ -1,7 +1,7 @@
 test interpret
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 
 
 function %icmp_sle_i8(i8, i8) -> b1 {

cranelift/filetests/filetests/runtests/icmp-slt.clif

@@ -1,7 +1,7 @@
 test interpret
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %icmp_slt_i8(i8, i8) -> b1 {
 block0(v0: i8, v1: i8):

cranelift/filetests/filetests/runtests/icmp-uge.clif

@@ -1,7 +1,7 @@
 test interpret
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %icmp_uge_i8(i8, i8) -> b1 {
 block0(v0: i8, v1: i8):

cranelift/filetests/filetests/runtests/icmp-ugt.clif

@@ -1,7 +1,7 @@
 test interpret
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %icmp_ugt_i8(i8, i8) -> b1 {
 block0(v0: i8, v1: i8):

cranelift/filetests/filetests/runtests/icmp-ule.clif

@@ -1,7 +1,7 @@
 test interpret
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %icmp_ule_i8(i8, i8) -> b1 {
 block0(v0: i8, v1: i8):

cranelift/filetests/filetests/runtests/icmp-ult.clif

@@ -1,7 +1,7 @@
 test interpret
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %icmp_ult_i8(i8, i8) -> b1 {
 block0(v0: i8, v1: i8):

cranelift/filetests/filetests/runtests/icmp.clif

@@ -2,7 +2,7 @@ test interpret
 test run
 target aarch64
 target s390x
-target x86_64 machinst
+target x86_64
 
 ; This test is also a regression test for aarch64.
 ; We were not correctly handling the fact that the rhs constant value

cranelift/filetests/filetests/runtests/shifts.clif

@@ -1,6 +1,6 @@
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 target s390x
 
 

cranelift/filetests/filetests/runtests/simd-arithmetic-nondeterministic-x86_64.clif

@@ -3,7 +3,7 @@
 ; simd-arithmetic-nondeterministic*.clif as well.
 test run
 set enable_simd
-target x86_64 machinst skylake
+target x86_64 skylake
 
 function %fmax_f64x2(f64x2, f64x2) -> f64x2 {
 block0(v0: f64x2, v1: f64x2):

cranelift/filetests/filetests/runtests/simd-arithmetic.clif

@@ -2,9 +2,7 @@ test run
 target aarch64
 ; target s390x TODO: Not yet implemented on s390x
 set enable_simd
-target x86_64 machinst skylake
+target x86_64 skylake
-set enable_simd
-target x86_64 legacy skylake
 
 function %iadd_i32x4(i32x4, i32x4) -> i32x4 {
 block0(v0:i32x4, v1:i32x4):

cranelift/filetests/filetests/runtests/simd-bitselect-to-vselect.clif

@@ -3,12 +3,7 @@ target aarch64
 ; target s390x TODO: Not yet implemented on s390x
 set opt_level=speed_and_size
 set enable_simd
-target x86_64 machinst skylake
+target x86_64 skylake
-set opt_level=speed_and_size
-set enable_simd
-target x86_64 legacy haswell
-
-;; x86_64 legacy: Test if bitselect->vselect optimization works properly
 
 function %mask_from_icmp(i32x4, i32x4) -> i32x4 {
 block0(v0: i32x4, v1: i32x4):

cranelift/filetests/filetests/runtests/simd-bitwise-run.clif

@@ -1,7 +1,7 @@
 test run
 set enable_simd
 target aarch64
-target x86_64 legacy skylake
+target x86_64 skylake
 
 ; TODO: once available, replace all lane extraction with `icmp + all_ones`
 

cranelift/filetests/filetests/runtests/simd-bitwise.clif

@@ -2,7 +2,7 @@ test run
 target aarch64
 ; target s390x TODO: Not yet implemented on s390x
 set enable_simd
-target x86_64 machinst skylake
+target x86_64 skylake
 
 function %bitselect_i8x16(i8x16, i8x16, i8x16) -> i8x16 {
 block0(v0: i8x16, v1: i8x16, v2: i8x16):

cranelift/filetests/filetests/runtests/simd-comparison-legacy.clif

@@ -1,44 +0,0 @@
-test run
-set enable_simd
-target x86_64 legacy
-
-function %maxs_i8x16() -> b1 {
-block0:
-    v0 = vconst.i8x16 [1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1] ; 1 will be greater than -1 == 0xff with
-    ; signed max
-    v1 = vconst.i8x16 [0xff 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1]
-    v2 = x86_pmaxs v0, v1
-    v8 = vall_true v2
-    return v8
-}
-; run
-
-function %maxu_i16x8() -> b1 {
-block0:
-    v0 = vconst.i16x8 [0 1 1 1 1 1 1 1]
-    v1 = vconst.i16x8 [-1 1 1 1 1 1 1 1] ; -1 == 0xff will be greater with unsigned max
-    v2 = x86_pmaxu v0, v1
-    v8 = vall_true v2
-    return v8
-}
-; run
-
-function %mins_i32x4() -> b1 {
-block0:
-    v0 = vconst.i32x4 [0 1 1 1]
-    v1 = vconst.i32x4 [-1 1 1 1] ; -1 == 0xff will be less with signed min
-    v2 = x86_pmins v0, v1
-    v8 = vall_true v2
-    return v8
-}
-; run
-
-function %minu_i8x16() -> b1 {
-block0:
-    v0 = vconst.i8x16 [1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1] ; 1 < 2 with unsiged min
-    v1 = vconst.i8x16 [2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2]
-    v2 = x86_pminu v0, v1
-    v8 = vall_true v2
-    return v8
-}
-; run

cranelift/filetests/filetests/runtests/simd-comparison.clif

@@ -2,9 +2,7 @@ test run
 target aarch64
 ; target s390x TODO: Not yet implemented on s390x
 set enable_simd
-target x86_64 machinst
+target x86_64
-set enable_simd
-target x86_64 legacy
 
 function %icmp_eq_i8x16() -> b8 {
 block0:

cranelift/filetests/filetests/runtests/simd-conversion.clif

@@ -2,9 +2,7 @@ test run
 target aarch64
 ; target s390x TODO: Not yet implemented on s390x
 set enable_simd
-target x86_64 machinst
+target x86_64
-set enable_simd
-target x86_64 legacy
 
 function %fcvt_from_sint(i32x4) -> f32x4 {
 block0(v0: i32x4):

cranelift/filetests/filetests/runtests/simd-iabs.clif

@@ -2,7 +2,7 @@ test interpret
 test run
 target aarch64
 set enable_simd
-target x86_64 machinst
+target x86_64
 
 function %iabs_i8x16(i8x16) -> i8x16 {
 block0(v0: i8x16):

cranelift/filetests/filetests/runtests/simd-lane-access-legacy.clif

@@ -1,221 +0,0 @@
-test run
-set enable_simd
-target x86_64 legacy
-
-function %shuffle_different_ssa_values() -> b1 {
-block0:
-    v0 = vconst.i8x16 0x00
-    v1 = vconst.i8x16 [0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 42]
-    v2 = shuffle v0, v1, [0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 31]     ; use the first lane of v0 throughout except use the last lane of v1
-    v3 = extractlane.i8x16 v2, 15
-    v4 = iconst.i8 42
-    v5 = icmp eq v3, v4
-    return v5
-}
-; run
-
-function %shuffle_same_ssa_value() -> b1 {
-block0:
-    v0 = vconst.i8x16 0x01000000_00000000_00000000_00000000     ; note where lane 15 is when written with hexadecimal syntax
-    v1 = shuffle v0, v0, 0x0f0f0f0f_0f0f0f0f_0f0f0f0f_0f0f0f0f  ; use the last lane of v0 to fill all lanes
-    v2 = extractlane.i8x16 v1, 4
-    v3 = iconst.i8 0x01
-    v4 = icmp eq v2, v3
-    return v4
-}
-; run
-
-function %compare_shuffle() -> b1 {
-block0:
-    v1 = vconst.i32x4 [0 1 2 3]
-    v2 = raw_bitcast.i8x16  v1 ; we have to cast because shuffle is type-limited to Tx16
-    ; keep each lane in place from the first vector
-    v3 = shuffle v2, v2, [0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15]
-    v4 = raw_bitcast.i32x4 v3
-    v5 = extractlane.i32x4 v4, 3
-    v6 = icmp_imm eq v5, 3
-    v7 = extractlane.i32x4 v4, 0
-    v8 = icmp_imm eq v7, 0
-    v9 = band v6, v8
-    return v9
-}
-; run
-
-function %compare_shuffle() -> b32 {
-block0:
-    v1 = vconst.b32x4 [true false true false]
-    v2 = raw_bitcast.b8x16 v1 ; we have to cast because shuffle is type-limited to Tx16
-    ; pair up the true values to make the entire vector true
-    v3 = shuffle v2, v2, [0 1 2 3 0 1 2 3 8 9 10 11 8 9 10 11]
-    v4 = raw_bitcast.b32x4 v3
-    v5 = extractlane v4, 3
-    v6 = extractlane v4, 0
-    v7 = band v5, v6
-    return v7
-}
-; run
-
-; TODO once SIMD vector comparison is implemented, remove use of extractlane below
-
-function %insertlane_b8() -> b8 {
-block0:
-    v1 = bconst.b8 true
-    v2 = vconst.b8x16 [false false false false false false false false false false false false false
-     false false false]
-    v3 = insertlane v2, v1, 10
-    v4 = extractlane v3, 10
-    return v4
-}
-; run
-
-function %insertlane_f32() -> b1 {
-block0:
-    v0 = f32const 0x42.42
-    v1 = vconst.f32x4 0x00
-    v2 = insertlane v1, v0, 1
-    v3 = extractlane v2, 1
-    v4 = fcmp eq v3, v0
-    return v4
-}
-; run
-
-function %insertlane_f64_lane1() -> b1 {
-block0:
-    v0 = f64const 0x42.42
-    v1 = vconst.f64x2 0x00
-    v2 = insertlane v1, v0, 1
-    v3 = extractlane v2, 1
-    v4 = fcmp eq v3, v0
-    return v4
-}
-; run
-
-function %insertlane_f64_lane0() -> b1 {
-block0:
-    v0 = f64const 0x42.42
-    v1 = vconst.f64x2 0x00
-    v2 = insertlane v1, v0, 0
-    v3 = extractlane v2, 0
-    v4 = fcmp eq v3, v0
-    return v4
-}
-; run
-
-function %extractlane_b8() -> b8 {
-block0:
-    v1 = vconst.b8x16 [false false false false false false false false false false true false false
-    false false false]
-    v2 = extractlane v1, 10
-    return v2
-}
-; run
-
-function %extractlane_i16() -> b1 {
-block0:
-    v0 = vconst.i16x8 0x00080007000600050004000300020001
-    v1 = extractlane v0, 1
-    v2 = icmp_imm eq v1, 2
-    return v2
-}
-; run
-
-function %extractlane_f32() -> b1 {
-block0:
-    v0 = f32const 0x42.42
-    v1 = vconst.f32x4 [0x00.00 0x00.00 0x00.00 0x42.42]
-    v2 = extractlane v1, 3
-    v3 = fcmp eq v2, v0
-    return v3
-}
-; run
-
-function %extractlane_i32_with_vector_reuse() -> b1 {
-block0:
-    v0 = iconst.i32 42
-    v1 = iconst.i32 99
-
-    v2 = splat.i32x4 v0
-    v3 = insertlane v2, v1, 2
-
-    v4 = extractlane v3, 3
-    v5 = icmp eq v4, v0
-
-    v6 = extractlane v3, 2
-    v7 = icmp eq v6, v1
-
-    v8 = band v5, v7
-    return v8
-}
-; run
-
-function %extractlane_f32_with_vector_reuse() -> b1 {
-block0:
-    v0 = f32const 0x42.42
-    v1 = f32const 0x99.99
-
-    v2 = splat.f32x4 v0
-    v3 = insertlane v2, v1, 2
-
-    v4 = extractlane v3, 3
-    v5 = fcmp eq v4, v0
-
-    v6 = extractlane v3, 2
-    v7 = fcmp eq v6, v1
-
-    v8 = band v5, v7
-    return v8
-}
-; run
-
-function %swizzle() -> b1 {
-block0:
-    v0 = vconst.i8x16 [0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15]
-    v1 = vconst.i8x16 [15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 42]
-    v2 = swizzle.i8x16 v0, v1 ; reverse the lanes, with over-large index 42 using lane 0
-
-    v3 = vconst.i8x16 [15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0]
-    v4 = icmp eq v2, v3
-    v5 = vall_true v4
-    return v5
-}
-; run
-
-function %swizzle_with_overflow() -> b1 {
-block0:
-    v0 = vconst.i8x16 [0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15]
-    v1 = vconst.i8x16 [16 250 0 0 0 0 0 0 0 0 0 0 0 0 0 0]
-    v2 = swizzle.i8x16 v0, v1 ; 250 should overflow but saturate so that the MSB is set (PSHUFB uses this to shuffle from lane 0)
-
-    v3 = vconst.i8x16 [0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0]
-    v4 = icmp eq v2, v3
-    v5 = vall_true v4
-    return v5
-}
-; run
-
-function %unpack_low() -> b1 {
-block0:
-    v0 = vconst.i32x4 [0 1 2 3]
-    v1 = vconst.i32x4 [4 5 6 7]
-    v2 = x86_punpckl v0, v1
-
-    v3 = vconst.i32x4 [0 4 1 5]
-    v4 = icmp eq v2, v3
-    v5 = vall_true v4
-    return v5
-}
-; run
-
-function %snarrow(i32x4, i32x4) -> i16x8 {
-block0(v0: i32x4, v1: i32x4):
-    v2 = snarrow v0, v1
-    return v2
-}
-; run: %snarrow([0 1 -1 0x0001ffff], [4 5 -6 0xffffffff]) == [0 1 -1 0x7fff 4 5 -6 0xffff]
-
-function %unarrow(i32x4, i32x4) -> i16x8 {
-block0(v0: i32x4, v1: i32x4):
-    v2 = unarrow v0, v1
-    return v2
-}
-; run: %unarrow([0 1 -1 0x0001ffff], [4 5 -6 0xffffffff]) == [0 1 0 0xffff 4 5 0 0]

cranelift/filetests/filetests/runtests/simd-lane-access.clif

@@ -2,7 +2,7 @@ test run
 target aarch64
 ; target s390x TODO: Not yet implemented on s390x
 set enable_simd
-target x86_64 machinst
+target x86_64
 
 ;; shuffle
 

cranelift/filetests/filetests/runtests/simd-logical.clif

@@ -2,7 +2,7 @@ test run
 target aarch64
 ; target s390x TODO: Not yet implemented on s390x
 set enable_simd
-target x86_64 machinst
+target x86_64
 
 function %bnot() -> b32 {
 block0:

cranelift/filetests/filetests/runtests/simd-sqmulroundsat.clif

@@ -2,7 +2,7 @@ test interpret
 test run
 target aarch64
 set enable_simd
-target x86_64 machinst
+target x86_64
 
 function %sqmulrs_i16x8(i16x8, i16x8) -> i16x8 {
 block0(v0: i16x8, v1: i16x8):

cranelift/filetests/filetests/runtests/simd-swidenhigh.clif

@@ -2,7 +2,7 @@ test interpret
 test run
 target aarch64
 set enable_simd
-target x86_64 machinst
+target x86_64
 
 function %swidenhigh_i8x16(i8x16) -> i16x8 {
 block0(v0: i8x16):

cranelift/filetests/filetests/runtests/simd-swidenlow.clif

@@ -2,7 +2,7 @@ test interpret
 test run
 target aarch64
 set enable_simd
-target x86_64 machinst
+target x86_64
 
 function %swidenlow_i8x16(i8x16) -> i16x8 {
 block0(v0: i8x16):

cranelift/filetests/filetests/runtests/simd-swizzle.clif

@@ -2,7 +2,7 @@ test interpret
 test run
 target aarch64
 set enable_simd
-target x86_64 machinst
+target x86_64
 
 function %swizzle_i8x16(i8x16, i8x16) -> i8x16 {
 block0(v0: i8x16, v1: i8x16):

cranelift/filetests/filetests/runtests/simd-uwidenhigh.clif

@@ -2,7 +2,7 @@ test interpret
 test run
 target aarch64
 set enable_simd
-target x86_64 machinst
+target x86_64
 
 function %uwidenhigh_i8x16(i8x16) -> i16x8 {
 block0(v0: i8x16):

cranelift/filetests/filetests/runtests/simd-uwidenlow.clif

@@ -2,7 +2,7 @@ test interpret
 test run
 target aarch64
 set enable_simd
-target x86_64 machinst
+target x86_64
 
 function %uwidenlow_i8x16(i8x16) -> i16x8 {
 block0(v0: i8x16):

cranelift/filetests/filetests/runtests/simd-valltrue.clif

@@ -1,7 +1,7 @@
 test interpret
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %vall_true_b8x16(b8x16) -> b1 {
 block0(v0: b8x16):

cranelift/filetests/filetests/runtests/simd-vanytrue.clif

@@ -1,7 +1,7 @@
 test interpret
 test run
 target aarch64
-target x86_64 machinst
+target x86_64
 
 function %vany_true_b8x16(b8x16) -> b1 {
 block0(v0: b8x16):

cranelift/filetests/filetests/runtests/simd-vconst-optimized-legacy.clif

@@ -1,46 +0,0 @@
-test run
-set enable_simd
-target x86_64 legacy
-
-function %vconst_syntax() -> b1 {
-block0:
-    v0 = vconst.i32x4 0x00000004_00000003_00000002_00000001     ; build constant using hexadecimal syntax
-    v1 = vconst.i32x4 [1 2 3 4]                                 ; build constant using literal list syntax
-
-    ; verify lane 1 matches
-    v2 = extractlane v0, 1
-    v3 = extractlane v1, 1
-    v4 = icmp eq v3, v2
-
-    ; verify lane 1 has the correct value
-    v5 = icmp_imm eq v3, 2
-
-    v6 = band v4, v5
-    return v6
-}
-; run
-
-; Since both jump tables and constants are emitted after the function body, it is important that any RIP-relative
-; addressing of constants is not incorrect in the presence of jump tables. This test confirms that, even when both
-; jump tables and constants are emitted, the constant addressing works correctly.
-function %vconst_with_jumptables() -> b1 {
-jt0 = jump_table [block0]
-
-block10:
-    v10 = iconst.i64 0
-    br_table v10, block1, jt0
-block0:
-    v0 = iconst.i64 100
-    jump block11(v0)
-block1:
-    v1 = iconst.i64 101
-    jump block11(v1)
-block11(v11: i64):
-    v12 = icmp_imm eq v11, 100        ; We should have jumped through block 0.
-    v13 = vconst.i32x4 [1 2 3 4]
-    v14 = extractlane.i32x4 v13, 1 ; Extract the second element...
-    v15 = icmp_imm eq v14, 2       ; ...which should be the value 2.
-    v16 = band v12, v15
-    return v16
-}
-; run

cranelift/filetests/filetests/runtests/simd-vconst.clif

@@ -2,11 +2,7 @@ test run
 ; target s390x TODO: Not yet implemented on s390x
 target aarch64
 set enable_simd
-target x86_64 machinst
+target x86_64
-set enable_simd
-target x86_64 legacy
-set enable_simd
-target x86_64 legacy skylake
 
 
 function %vconst_zeroes() -> b1 {

cranelift/filetests/filetests/runtests/simd-vhighbits.clif

@@ -2,7 +2,7 @@ test interpret
 test run
 target aarch64
 set enable_simd
-target x86_64 machinst
+target x86_64
 
 function %vhighbits_i8x16(i8x16) -> i16 {
 block0(v0: i8x16):

cranelift/filetests/filetests/runtests/simd-vselect.clif

@@ -3,7 +3,7 @@ test run
 ; target s390x TODO: Not yet implemented on s390x
 target aarch64
 set enable_simd
-target x86_64 machinst
+target x86_64
 
 function %vselect_i8x16() -> i8x16 {
 block0:

cranelift/filetests/filetests/runtests/smulhi.clif

@@ -2,7 +2,7 @@ test interpret
 test run
 target aarch64
 set enable_simd
-target x86_64 machinst
+target x86_64
 
 function %smulhi_i16(i16, i16) -> i16 {
 block0(v0: i16, v1: i16):

cranelift/filetests/filetests/runtests/spill-reload.clif

@@ -1,8 +1,7 @@
 test run
 target s390x
 target aarch64
-target x86_64 machinst
+target x86_64
-target x86_64 legacy
 
 function %f(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) -> i64 {
 block0(v0: i32, v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32, v7: i32, v8: i32, v9: i32, v10: i32, v11: i32, v12: i32, v13: i32, v14: i32, v15: i32, v16: i32, v17: i32, v18: i32, v19: i32):

cranelift/filetests/filetests/runtests/stack-addr-64.clif

@@ -1,6 +1,6 @@
 test interpret
 test run
-target x86_64 machinst
+target x86_64
 target s390x
 target aarch64
 

cranelift/filetests/filetests/runtests/stack.clif

@@ -1,6 +1,6 @@
 test interpret
 test run
-target x86_64 machinst
+target x86_64
 target s390x
 target aarch64
 

cranelift/filetests/filetests/runtests/umulhi.clif

@@ -2,7 +2,7 @@ test interpret
 test run
 target aarch64
 set enable_simd
-target x86_64 machinst
+target x86_64
 
 function %umulhi_i16(i16, i16) -> i16 {
 block0(v0: i16, v1: i16):