fix for ctz and clz
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.gitignore
vendored
1
.gitignore
vendored
@@ -10,3 +10,4 @@ rusty-tags.*
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docs/_build
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*~
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\#*\#
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.vscode
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159
src/backend.rs
159
src/backend.rs
@@ -3230,10 +3230,161 @@ impl<'this, M: ModuleContext> Context<'this, M> {
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self.push(out);
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}
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unop!(i32_clz, lzcnt, Rd, u32, u32::leading_zeros);
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unop!(i64_clz, lzcnt, Rq, u64, |a: u64| a.leading_zeros() as u64);
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unop!(i32_ctz, tzcnt, Rd, u32, u32::trailing_zeros);
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unop!(i64_ctz, tzcnt, Rq, u64, |a: u64| a.trailing_zeros() as u64);
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pub fn i32_clz(&mut self) {
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let val = self.pop();
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let out_val = match val {
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ValueLocation::Immediate(imm) =>
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ValueLocation::Immediate(
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((imm.as_int().unwrap() as i32).leading_zeros() as i32).into()
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),
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ValueLocation::Stack(offset) => {
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let offset = self.adjusted_offset(offset);
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let temp = self.take_reg(I32).unwrap();
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let temp_2 = self.take_reg(I32).unwrap();
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dynasm!(self.asm
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; bsr Rd(temp.rq().unwrap()), [rsp + offset]
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; mov Rd(temp_2.rq().unwrap()), DWORD 0x3fu64 as _
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; cmove Rd(temp.rq().unwrap()), Rd(temp_2.rq().unwrap())
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; mov Rd(temp_2.rq().unwrap()), DWORD 0x1fu64 as _
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; xor Rd(temp.rq().unwrap()), Rd(temp_2.rq().unwrap())
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);
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ValueLocation::Reg(temp)
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}
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ValueLocation::Reg(_) | ValueLocation::Cond(_) => {
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let reg = self.into_reg(GPRType::Rq, val).unwrap();
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let temp = self.take_reg(I32).unwrap();
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dynasm!(self.asm
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; bsr Rd(temp.rq().unwrap()), Rd(reg.rq().unwrap())
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; mov Rd(reg.rq().unwrap()), DWORD 0x3fu64 as _
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; cmove Rd(temp.rq().unwrap()), Rd(reg.rq().unwrap())
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; mov Rd(reg.rq().unwrap()), DWORD 0x1fu64 as _
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; xor Rd(temp.rq().unwrap()), Rd(reg.rq().unwrap())
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);
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ValueLocation::Reg(temp)
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}
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};
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self.free_value(val);
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self.push(out_val);
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}
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pub fn i64_clz(&mut self) {
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let val = self.pop();
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let out_val = match val {
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ValueLocation::Immediate(imm) =>
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ValueLocation::Immediate(
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((imm.as_int().unwrap() as u64).leading_zeros() as u64).into()
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),
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ValueLocation::Stack(offset) => {
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let offset = self.adjusted_offset(offset);
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let temp = self.take_reg(I64).unwrap();
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let temp_2 = self.take_reg(I64).unwrap();
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dynasm!(self.asm
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; bsr Rq(temp.rq().unwrap()), [rsp + offset]
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; mov Rq(temp_2.rq().unwrap()), QWORD 0x7fu64 as _
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; cmove Rq(temp.rq().unwrap()), Rq(temp_2.rq().unwrap())
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; mov Rq(temp_2.rq().unwrap()), QWORD 0x3fu64 as _
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; xor Rq(temp.rq().unwrap()), Rq(temp_2.rq().unwrap())
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);
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ValueLocation::Reg(temp)
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}
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ValueLocation::Reg(_) | ValueLocation::Cond(_) => {
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let reg = self.into_reg(GPRType::Rq, val).unwrap();
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let temp = self.take_reg(I64).unwrap();
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dynasm!(self.asm
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; bsr Rq(temp.rq().unwrap()), Rq(reg.rq().unwrap())
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; mov Rq(reg.rq().unwrap()), QWORD 0x7fu64 as _
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; cmove Rq(temp.rq().unwrap()), Rq(reg.rq().unwrap())
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; mov Rq(reg.rq().unwrap()), QWORD 0x3fu64 as _
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; xor Rq(temp.rq().unwrap()), Rq(reg.rq().unwrap())
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);
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ValueLocation::Reg(temp)
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}
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};
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self.free_value(val);
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self.push(out_val);
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}
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pub fn i32_ctz(&mut self) {
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let val = self.pop();
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let out_val = match val {
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ValueLocation::Immediate(imm) =>
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ValueLocation::Immediate(
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((imm.as_int().unwrap() as u32).trailing_zeros() as u32).into()
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),
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ValueLocation::Stack(offset) => {
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let offset = self.adjusted_offset(offset);
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let temp = self.take_reg(I32).unwrap();
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let temp_zero_val = self.take_reg(I32).unwrap();
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dynasm!(self.asm
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; bsf Rd(temp.rq().unwrap()), [rsp + offset]
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; mov Rd(temp_zero_val.rq().unwrap()), DWORD 0x20u32 as _
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; cmove Rd(temp.rq().unwrap()), Rd(temp_zero_val.rq().unwrap())
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);
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ValueLocation::Reg(temp)
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}
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ValueLocation::Reg(_) | ValueLocation::Cond(_) => {
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let reg = self.into_reg(GPRType::Rq, val).unwrap();
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let temp = self.take_reg(I32).unwrap();
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dynasm!(self.asm
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; bsf Rd(temp.rq().unwrap()), Rd(reg.rq().unwrap())
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; mov Rd(reg.rq().unwrap()), DWORD 0x20u32 as _
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; cmove Rd(temp.rq().unwrap()), Rd(reg.rq().unwrap())
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);
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ValueLocation::Reg(temp)
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}
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};
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self.free_value(val);
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self.push(out_val);
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}
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pub fn i64_ctz(&mut self) {
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let val = self.pop();
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let out_val = match val {
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ValueLocation::Immediate(imm) =>
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ValueLocation::Immediate(
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((imm.as_int().unwrap() as u64).trailing_zeros() as u64).into()
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),
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ValueLocation::Stack(offset) => {
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let offset = self.adjusted_offset(offset);
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let temp = self.take_reg(I64).unwrap();
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let temp_zero_val = self.take_reg(I64).unwrap();
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dynasm!(self.asm
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; bsf Rq(temp.rq().unwrap()), [rsp + offset]
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; mov Rq(temp_zero_val.rq().unwrap()), QWORD 0x40u64 as _
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; cmove Rq(temp.rq().unwrap()), Rq(temp_zero_val.rq().unwrap())
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);
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ValueLocation::Reg(temp)
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}
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ValueLocation::Reg(_) | ValueLocation::Cond(_) => {
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let reg = self.into_reg(GPRType::Rq, val).unwrap();
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let temp = self.take_reg(I64).unwrap();
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dynasm!(self.asm
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; bsf Rq(temp.rq().unwrap()), Rq(reg.rq().unwrap())
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; mov Rq(reg.rq().unwrap()), QWORD 0x40u64 as _
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; cmove Rq(temp.rq().unwrap()), Rq(reg.rq().unwrap())
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);
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ValueLocation::Reg(temp)
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}
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};
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self.free_value(val);
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self.push(out_val);
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}
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pub fn i32_extend_u(&mut self) {
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let val = self.pop();
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