cranelift: Remove brz and brnz (#5630)

Remove the brz and brnz instructions, as their behavior is now redundant with brif.

cranelift/codegen/src/isa/riscv64/inst.isle

@@ -1868,8 +1868,8 @@
 (decl int_zero_reg (Type) ValueRegs)
 (extern constructor int_zero_reg int_zero_reg)
 
-(decl lower_brz_or_nz (IntCC ValueRegs VecMachLabel Type) Unit)
-(extern constructor lower_brz_or_nz lower_brz_or_nz)
+(decl lower_cond_br (IntCC ValueRegs VecMachLabel Type) Unit)
+(extern constructor lower_cond_br lower_cond_br)
 
 ;; Normalize a value for comparision.
 ;;
@@ -1901,14 +1901,14 @@
 ;; Default behavior for branching based on an input value.
 (rule
   (lower_branch (brif v @ (value_type ty) _ _) targets)
-  (lower_brz_or_nz (IntCC.NotEqual) (normalize_cmp_value ty v) targets ty))
+  (lower_cond_br (IntCC.NotEqual) (normalize_cmp_value ty v) targets ty))
 
 ;; Special case for SI128 to reify the comparison value and branch on it.
 (rule 2
   (lower_branch (brif v @ (value_type $I128) _ _) targets)
   (let ((zero ValueRegs (value_regs (zero_reg) (zero_reg)))
         (cmp Reg (gen_icmp (IntCC.NotEqual) v zero $I128)))
-    (lower_brz_or_nz (IntCC.NotEqual) cmp targets $I64)))
+    (lower_cond_br (IntCC.NotEqual) cmp targets $I64)))
 
 ;; Branching on the result of an icmp
 (rule 1
@@ -1930,66 +1930,6 @@
         (else BranchTarget (label_to_br_target (vec_label_get targets 1))))
     (emit_side_effect (cond_br (emit_fcmp cc ty a b) then else))))
 
-;;;;;
-(rule
-  (lower_branch (brz v @ (value_type ty) _) targets)
-  (lower_brz_or_nz (IntCC.Equal) (normalize_cmp_value ty v) targets ty))
-
-;; Special case for SI128 to reify the comparison value and branch on it.
-(rule 2
-  (lower_branch (brz v @ (value_type $I128) _) targets)
-  (let ((zero ValueRegs (value_regs (zero_reg) (zero_reg)))
-        (cmp Reg (gen_icmp (IntCC.Equal) v zero $I128)))
-    (lower_brz_or_nz (IntCC.NotEqual) cmp targets $I64)))
-
-(rule 1
-  (lower_branch (brz (maybe_uextend (icmp cc a @ (value_type ty) b)) _) targets)
-  (lower_br_icmp (intcc_inverse cc) a b targets ty))
-
-(rule 1
-  (lower_branch (brz (maybe_uextend (fcmp cc a @ (value_type ty) b)) _) targets)
-  (if-let $true (floatcc_unordered cc))
-  (let ((then BranchTarget (label_to_br_target (vec_label_get targets 0)))
-        (else BranchTarget (label_to_br_target (vec_label_get targets 1))))
-    (emit_side_effect (cond_br (emit_fcmp (floatcc_inverse cc) ty a b) then else))))
-
-(rule 1
-  (lower_branch (brz (maybe_uextend (fcmp cc a @ (value_type ty) b)) _) targets)
-  (if-let $false (floatcc_unordered cc))
-  (let ((then BranchTarget (label_to_br_target (vec_label_get targets 0)))
-        (else BranchTarget (label_to_br_target (vec_label_get targets 1))))
-    (emit_side_effect (cond_br (emit_fcmp cc ty a b) else then))))
-
-;;;;
-(rule
-  (lower_branch (brnz v @ (value_type ty) _) targets)
-  (lower_brz_or_nz (IntCC.NotEqual) (normalize_cmp_value ty v) targets ty))
-
-;; Special case for SI128 to reify the comparison value and branch on it.
-(rule 2
-  (lower_branch (brnz v @ (value_type $I128) _) targets)
-  (let ((zero ValueRegs (value_regs (zero_reg) (zero_reg)))
-        (cmp Reg (gen_icmp (IntCC.NotEqual) v zero $I128)))
-    (lower_brz_or_nz (IntCC.NotEqual) cmp targets $I64)))
-
-(rule 1
-  (lower_branch (brnz (maybe_uextend (icmp cc a @ (value_type ty) b)) _) targets)
-  (lower_br_icmp cc a b targets ty))
-
-(rule 1
-  (lower_branch (brnz (maybe_uextend (fcmp cc a @ (value_type ty) b)) _) targets)
-  (if-let $true (floatcc_unordered cc))
-  (let ((then BranchTarget (label_to_br_target (vec_label_get targets 0)))
-        (else BranchTarget (label_to_br_target (vec_label_get targets 1))))
-    (emit_side_effect (cond_br (emit_fcmp (floatcc_inverse cc) ty a b) else then))))
-
-(rule 1
-  (lower_branch (brnz (maybe_uextend (fcmp cc a @ (value_type ty) b)) _) targets)
-  (if-let $false (floatcc_unordered cc))
-  (let ((then BranchTarget (label_to_br_target (vec_label_get targets 0)))
-        (else BranchTarget (label_to_br_target (vec_label_get targets 1))))
-    (emit_side_effect (cond_br (emit_fcmp cc ty a b) then else))))
-
 ;;;
 (decl lower_br_table (Reg VecMachLabel) Unit)
 (extern constructor lower_br_table lower_br_table)

cranelift/codegen/src/isa/riscv64/inst/args.rs

@@ -118,7 +118,6 @@ impl Into<AMode> for StackAMode {
 }
 
 /// risc-v always take two register to compare
-/// brz can be compare with zero register which has the value 0
 #[derive(Clone, Copy, Debug)]
 pub struct IntegerCompare {
     pub(crate) kind: IntCC,

cranelift/codegen/src/isa/riscv64/inst/unwind/systemv.rs

@@ -159,8 +159,7 @@ mod tests {
 
         let mut pos = FuncCursor::new(&mut func);
         pos.insert_block(block0);
-        pos.ins().brnz(v0, block2, &[]);
-        pos.ins().jump(block1, &[]);
+        pos.ins().brif(v0, block2, &[], block1, &[]);
 
         pos.insert_block(block1);
         pos.ins().return_(&[]);

cranelift/codegen/src/isa/riscv64/lower/isle.rs

@@ -61,7 +61,7 @@ impl generated_code::Context for IsleContext<'_, '_, MInst, Riscv64Backend> {
         }
     }
 
-    fn lower_brz_or_nz(
+    fn lower_cond_br(
         &mut self,
         cc: &IntCC,
         a: ValueRegs,