Cranelift AArch64: Harden the Spectre mitigations (#4555)

Use the `CSDB` instruction following Arm's recommendation.

Copyright (c) 2022, Arm Limited.

cranelift/codegen/src/isa/aarch64/lower_inst.rs

@@ -375,6 +375,10 @@ pub(crate) fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
                     op, ty
                 )));
             }
+
+            if op == Opcode::SelectifSpectreGuard {
+                ctx.emit(Inst::Csdb);
+            }
         }
 
         Opcode::Bitselect | Opcode::Vselect => implemented_in_isle(ctx),