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Change the stack alignment for 32-bit x86 to 16.

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Spiderwasm on 32-bit x86 always uses a 16-byte-aligned stack pointer.

Change the setting for the "native" convention as well, for
compatibility with Linux and Darwin ABIs, and so that if a platform
has different ABI rules, the problem will be detected in code emitted by
Cretonne, rather than somewhere else.
This commit is contained in:
Dan Gohman
2018-03-02 13:22:09 -08:00
parent aac006ed49
commit a301280d94
1 changed files with 7 additions and 10 deletions
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17
lib/cretonne/src/isa/intel/abi.rs
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@@ -180,11 +180,9 @@ pub fn spiderwasm_prologue_epilogue(
func: &mut ir::Function, func: &mut ir::Function,
isa: &TargetIsa, isa: &TargetIsa,
) -> result::CtonResult { ) -> result::CtonResult {
let (word_size, stack_align) = if isa.flags().is_64bit() { // Spiderwasm on 32-bit x86 always aligns its stack pointer to 16 bytes.
(8, 16) let stack_align = 16;
} else { let word_size = if isa.flags().is_64bit() { 8 } else { 4 };
(4, 4)
};
let bytes = StackSize::from(isa.flags().spiderwasm_prologue_words()) * word_size; let bytes = StackSize::from(isa.flags().spiderwasm_prologue_words()) * word_size;
let mut ss = ir::StackSlotData::new(ir::StackSlotKind::IncomingArg, bytes); let mut ss = ir::StackSlotData::new(ir::StackSlotKind::IncomingArg, bytes);
@@ -197,11 +195,10 @@ pub fn spiderwasm_prologue_epilogue(
/// Insert a System V-compatible prologue and epilogue. /// Insert a System V-compatible prologue and epilogue.
pub fn native_prologue_epilogue(func: &mut ir::Function, isa: &TargetIsa) -> result::CtonResult { pub fn native_prologue_epilogue(func: &mut ir::Function, isa: &TargetIsa) -> result::CtonResult {
let (word_size, stack_align) = if isa.flags().is_64bit() { // The original 32-bit x86 ELF ABI had a 4-byte aligned stack pointer, but
(8, 16) // newer versions use a 16-byte aligned stack pointer.
} else { let stack_align = 16;
(4, 4) let word_size = if isa.flags().is_64bit() { 8 } else { 4 };
};
let csr_type = if isa.flags().is_64bit() { let csr_type = if isa.flags().is_64bit() {
ir::types::I64 ir::types::I64
} else { } else {