aarch64: Implement isub for i128 operands

2021-05-22 21:22:05 +01:00
parent d3b525fa29
commit a2e74b2c45
6 changed files with 109 additions and 27 deletions
--- a/cranelift/codegen/src/isa/aarch64/inst/emit_tests.rs
+++ b/cranelift/codegen/src/isa/aarch64/inst/emit_tests.rs
@@ -90,6 +90,27 @@ fn test_aarch64_binemit() {
        "A40006CB",
        "sub x4, x5, x6",
    ));
+    insns.push((
+        Inst::AluRRR {
+            alu_op: ALUOp::Sbc32,
+            rd: writable_xreg(1),
+            rn: xreg(2),
+            rm: xreg(3),
+        },
+        "4100035A",
+        "sbc w1, w2, w3",
+    ));
+    insns.push((
+        Inst::AluRRR {
+            alu_op: ALUOp::Sbc64,
+            rd: writable_xreg(4),
+            rn: xreg(5),
+            rm: xreg(6),
+        },
+        "A40006DA",
+        "sbc x4, x5, x6",
+    ));
+
    insns.push((
        Inst::AluRRR {
            alu_op: ALUOp::Orr32,