aarch64: Implement isub for i128 operands

2021-05-22 21:22:05 +01:00
parent d3b525fa29
commit a2e74b2c45
6 changed files with 109 additions and 27 deletions
--- a/cranelift/codegen/src/isa/aarch64/inst/emit.rs
+++ b/cranelift/codegen/src/isa/aarch64/inst/emit.rs
@@ -601,6 +601,8 @@ impl MachInstEmit for Inst {
                    ALUOp::Adc64 => 0b10011010_000,
                    ALUOp::Sub32 => 0b01001011_000,
                    ALUOp::Sub64 => 0b11001011_000,
+                    ALUOp::Sbc32 => 0b01011010_000,
+                    ALUOp::Sbc64 => 0b11011010_000,
                    ALUOp::Orr32 => 0b00101010_000,
                    ALUOp::Orr64 => 0b10101010_000,
                    ALUOp::And32 => 0b00001010_000,