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Replace ExtractLane format with BinaryImm8

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Like https://github.com/bytecodealliance/wasmtime/pull/1762, this change the name of the `ExtractLane` format to the more-general `BinaryImm8` and renames its immediate argument from `lane` to `imm`.
This commit is contained in:
Andrew Brown
2020-05-27 09:24:46 -07:00
parent 7d6e94b952
commit a27a079d65
9 changed files with 36 additions and 39 deletions
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4
cranelift/codegen/meta/src/isa/x86/instructions.rs
View File

@@ -283,7 +283,7 @@ pub(crate) fn define(
Packed Shuffle Doublewords -- copies data from either memory or lanes in an extended
register and re-orders the data according to the passed immediate byte.
"#,
&formats.extract_lane,
&formats.binary_imm8,
)
.operands_in(vec![a, i]) // TODO allow copying from memory here (need more permissive type than TxN)
.operands_out(vec![a]),
@@ -314,7 +314,7 @@ pub(crate) fn define(
The lane index, ``Idx``, is an immediate value, not an SSA value. It
must indicate a valid lane index for the type of ``x``.
"#,
&formats.extract_lane,
&formats.binary_imm8,
)
.operands_in(vec![x, Idx])
.operands_out(vec![a]),

16
cranelift/codegen/meta/src/isa/x86/recipes.rs
View File

@@ -996,20 +996,20 @@ pub(crate) fn define<'shared>(
// XX /r ib with 8-bit unsigned immediate (e.g. for pshufd)
{
recipes.add_template_inferred(
EncodingRecipeBuilder::new("r_ib_unsigned_fpr", &formats.extract_lane, 2)
EncodingRecipeBuilder::new("r_ib_unsigned_fpr", &formats.binary_imm8, 2)
.operands_in(vec![fpr])
.operands_out(vec![fpr])
.inst_predicate(InstructionPredicate::new_is_unsigned_int(
&*formats.extract_lane,
"lane",
&*formats.binary_imm8,
"imm",
8,
0,
)) // TODO if the format name is changed then "lane" should be renamed to something more appropriate--ordering mask? broadcast immediate?
))
.emit(
r#"
{{PUT_OP}}(bits, rex2(in_reg0, out_reg0), sink);
modrm_rr(in_reg0, out_reg0, sink);
let imm:i64 = lane.into();
let imm: i64 = imm.into();
sink.put1(imm as u8);
"#,
),
@@ -1020,17 +1020,17 @@ pub(crate) fn define<'shared>(
// XX /r ib with 8-bit unsigned immediate (e.g. for extractlane)
{
recipes.add_template_inferred(
EncodingRecipeBuilder::new("r_ib_unsigned_gpr", &formats.extract_lane, 2)
EncodingRecipeBuilder::new("r_ib_unsigned_gpr", &formats.binary_imm8, 2)
.operands_in(vec![fpr])
.operands_out(vec![gpr])
.inst_predicate(InstructionPredicate::new_is_unsigned_int(
&*formats.extract_lane, "lane", 8, 0,
&*formats.binary_imm8, "imm", 8, 0,
))
.emit(
r#"
{{PUT_OP}}(bits, rex2(out_reg0, in_reg0), sink);
modrm_rr(out_reg0, in_reg0, sink); // note the flipped register in the ModR/M byte
let imm:i64 = lane.into();
let imm: i64 = imm.into();
sink.put1(imm as u8);
"#,
), "size_with_inferred_rex_for_inreg0_outreg0"