From a274cdf275c5df5f05c76214121d5ce2c5e90ccf Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Wed, 27 Sep 2017 18:14:13 -0700 Subject: [PATCH] Fix the Intel encoding of band_not. The andnps instruction inverts its first argument while band_not inverts is second argument. Use a swapped-operands "fax" encoding recipe. --- cranelift/filetests/isa/intel/binary32-float.cton | 8 ++++---- cranelift/filetests/isa/intel/binary64-float.cton | 8 ++++---- lib/cretonne/meta/isa/intel/encodings.py | 13 ++++++++----- lib/cretonne/meta/isa/intel/recipes.py | 14 +++++++++++--- 4 files changed, 27 insertions(+), 16 deletions(-) diff --git a/cranelift/filetests/isa/intel/binary32-float.cton b/cranelift/filetests/isa/intel/binary32-float.cton index 4f38807c9e..a880ed9a8a 100644 --- a/cranelift/filetests/isa/intel/binary32-float.cton +++ b/cranelift/filetests/isa/intel/binary32-float.cton @@ -78,9 +78,9 @@ ebb0: [-,%xmm2] v31 = band v11, v10 ; bin: 0f 54 d5 ; asm: andnps %xmm2, %xmm5 - [-,%xmm5] v32 = band_not v10, v11 ; bin: 0f 55 ea + [-,%xmm5] v32 = band_not v11, v10 ; bin: 0f 55 ea ; asm: andnps %xmm5, %xmm2 - [-,%xmm2] v33 = band_not v11, v10 ; bin: 0f 55 d5 + [-,%xmm2] v33 = band_not v10, v11 ; bin: 0f 55 d5 ; asm: orps %xmm2, %xmm5 [-,%xmm5] v34 = bor v10, v11 ; bin: 0f 56 ea @@ -281,9 +281,9 @@ ebb0: [-,%xmm2] v31 = band v11, v10 ; bin: 0f 54 d5 ; asm: andnps %xmm2, %xmm5 - [-,%xmm5] v32 = band_not v10, v11 ; bin: 0f 55 ea + [-,%xmm5] v32 = band_not v11, v10 ; bin: 0f 55 ea ; asm: andnps %xmm5, %xmm2 - [-,%xmm2] v33 = band_not v11, v10 ; bin: 0f 55 d5 + [-,%xmm2] v33 = band_not v10, v11 ; bin: 0f 55 d5 ; asm: orps %xmm2, %xmm5 [-,%xmm5] v34 = bor v10, v11 ; bin: 0f 56 ea diff --git a/cranelift/filetests/isa/intel/binary64-float.cton b/cranelift/filetests/isa/intel/binary64-float.cton index 2156ebc5db..18a24f9e7e 100644 --- a/cranelift/filetests/isa/intel/binary64-float.cton +++ b/cranelift/filetests/isa/intel/binary64-float.cton @@ -77,9 +77,9 @@ ebb0: [-,%xmm10] v31 = band v11, v10 ; bin: 44 0f 54 d5 ; asm: andnps %xmm10, %xmm5 - [-,%xmm5] v32 = band_not v10, v11 ; bin: 41 0f 55 ea + [-,%xmm5] v32 = band_not v11, v10 ; bin: 41 0f 55 ea ; asm: andnps %xmm5, %xmm10 - [-,%xmm10] v33 = band_not v11, v10 ; bin: 44 0f 55 d5 + [-,%xmm10] v33 = band_not v10, v11 ; bin: 44 0f 55 d5 ; asm: orps %xmm10, %xmm5 [-,%xmm5] v34 = bor v10, v11 ; bin: 41 0f 56 ea @@ -295,9 +295,9 @@ ebb0: [-,%xmm10] v31 = band v11, v10 ; bin: 44 0f 54 d5 ; asm: andnps %xmm10, %xmm5 - [-,%xmm5] v32 = band_not v10, v11 ; bin: 41 0f 55 ea + [-,%xmm5] v32 = band_not v11, v10 ; bin: 41 0f 55 ea ; asm: andnps %xmm5, %xmm10 - [-,%xmm10] v33 = band_not v11, v10 ; bin: 44 0f 55 d5 + [-,%xmm10] v33 = band_not v10, v11 ; bin: 44 0f 55 d5 ; asm: orps %xmm10, %xmm5 [-,%xmm5] v34 = bor v10, v11 ; bin: 41 0f 56 ea diff --git a/lib/cretonne/meta/isa/intel/encodings.py b/lib/cretonne/meta/isa/intel/encodings.py index f1d6a28900..671b743827 100644 --- a/lib/cretonne/meta/isa/intel/encodings.py +++ b/lib/cretonne/meta/isa/intel/encodings.py @@ -403,17 +403,20 @@ for inst, opc in [ (base.fdiv, 0x5e), (x86.fmin, 0x5d), (x86.fmax, 0x5f)]: - enc_flt(inst.f32, r.frm, 0xf3, 0x0f, opc) - enc_flt(inst.f64, r.frm, 0xf2, 0x0f, opc) + enc_flt(inst.f32, r.fa, 0xf3, 0x0f, opc) + enc_flt(inst.f64, r.fa, 0xf2, 0x0f, opc) # Binary bitwise ops. for inst, opc in [ (base.band, 0x54), - (base.band_not, 0x55), (base.bor, 0x56), (base.bxor, 0x57)]: - enc_flt(inst.f32, r.frm, 0x0f, opc) - enc_flt(inst.f64, r.frm, 0x0f, opc) + enc_flt(inst.f32, r.fa, 0x0f, opc) + enc_flt(inst.f64, r.fa, 0x0f, opc) + +# The `andnps(x,y)` instruction computes `~x&y`, while band_not(x,y)` is `x&~y. +enc_flt(base.band_not.f32, r.fax, 0x0f, 0x55) +enc_flt(base.band_not.f64, r.fax, 0x0f, 0x55) # Comparisons. # diff --git a/lib/cretonne/meta/isa/intel/recipes.py b/lib/cretonne/meta/isa/intel/recipes.py index eebba58700..fe29735efe 100644 --- a/lib/cretonne/meta/isa/intel/recipes.py +++ b/lib/cretonne/meta/isa/intel/recipes.py @@ -239,14 +239,22 @@ rrx = TailRecipe( modrm_rr(in_reg1, in_reg0, sink); ''') -# XX /r with FPR ins and outs. RM form. -frm = TailRecipe( - 'frm', Binary, size=1, ins=(FPR, FPR), outs=0, +# XX /r with FPR ins and outs. A form. +fa = TailRecipe( + 'fa', Binary, size=1, ins=(FPR, FPR), outs=0, emit=''' PUT_OP(bits, rex2(in_reg1, in_reg0), sink); modrm_rr(in_reg1, in_reg0, sink); ''') +# XX /r with FPR ins and outs. A form with input operands swapped. +fax = TailRecipe( + 'fax', Binary, size=1, ins=(FPR, FPR), outs=1, + emit=''' + PUT_OP(bits, rex2(in_reg0, in_reg1), sink); + modrm_rr(in_reg0, in_reg1, sink); + ''') + # XX /r, but for a unary operator with separate input/output register, like # copies. MR form. umr = TailRecipe(