T0b1/wasmtime
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

aarch64: Implement lowering brz,brnz for i128 values

Browse Source
This commit is contained in:
Afonso Bordado
2021-06-18 00:19:49 +01:00
parent fb07ff5740
commit a26be628bc
3 changed files with 86 additions and 31 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
cranelift/codegen/src/isa/aarch64/lower_inst.rs
View File

@@ -3515,6 +3515,7 @@ pub(crate) fn lower_branch<C: LowerCtx<I = Inst>>(
match op0 {
Opcode::Brz | Opcode::Brnz => {
let ty = ctx.input_ty(branches[0], 0);
let flag_input = InsnInput {
insn: branches[0],
input: 0,
@@ -3549,14 +3550,19 @@ pub(crate) fn lower_branch<C: LowerCtx<I = Inst>>(
kind: CondBrKind::Cond(cond),
});
} else {
let rt = put_input_in_reg(
ctx,
InsnInput {
insn: branches[0],
input: 0,
},
NarrowValueMode::ZeroExtend64,
);
let rt = if ty == I128 {
let tmp = ctx.alloc_tmp(I64).only_reg().unwrap();
let input = put_input_in_regs(ctx, flag_input);
ctx.emit(Inst::AluRRR {
alu_op: ALUOp::Orr64,
rd: tmp,
rn: input.regs()[0],
rm: input.regs()[1],
});
tmp.to_reg()
} else {
put_input_in_reg(ctx, flag_input, NarrowValueMode::ZeroExtend64)
};
let kind = match op0 {
Opcode::Brz => CondBrKind::Zero(rt),
Opcode::Brnz => CondBrKind::NotZero(rt),