Update to the latest stable rustfmt, 0.4.2-stable (febbb36 2018-04-12).

lib/codegen/src/abi.rs

@@ -184,8 +184,8 @@ pub fn legalize_abi_value(have: Type, arg: &AbiParam) -> ValueConversion {
 #[cfg(test)]
 mod tests {
     use super::*;
-    use ir::AbiParam;
     use ir::types;
+    use ir::AbiParam;
 
     #[test]
     fn legalize() {

lib/codegen/src/cfg_printer.rs

@@ -3,8 +3,8 @@
 use std::fmt::{Display, Formatter, Result, Write};
 
 use flowgraph::ControlFlowGraph;
-use ir::Function;
 use ir::instructions::BranchInfo;
+use ir::Function;
 
 /// A utility for pretty-printing the CFG of a `Function`.
 pub struct CFGPrinter<'a> {

lib/codegen/src/divconst_magic_numbers.rs

@@ -220,8 +220,8 @@ pub fn magicS64(d: i64) -> MS64 {
 
 #[cfg(test)]
 mod tests {
-    use super::{MS32, MS64, MU32, MU64};
     use super::{magicS32, magicS64, magicU32, magicU64};
+    use super::{MS32, MS64, MU32, MU64};
 
     fn mkMU32(mulBy: u32, doAdd: bool, shiftBy: i32) -> MU32 {
         MU32 {

lib/codegen/src/ir/dfg.rs

@@ -1151,8 +1151,8 @@ mod tests {
 
     #[test]
     fn aliases() {
-        use ir::InstBuilder;
         use ir::condcodes::IntCC;
+        use ir::InstBuilder;
 
         let mut func = Function::new();
         let ebb0 = func.dfg.make_ebb();

lib/codegen/src/ir/heap.rs

@@ -1,7 +1,7 @@
 //! Heaps.
 
-use ir::GlobalVar;
 use ir::immediates::Imm64;
+use ir::GlobalVar;
 use std::fmt;
 
 /// Information about a heap declaration.

lib/codegen/src/ir/stackslot.rs

@@ -338,8 +338,8 @@ impl StackSlots {
 #[cfg(test)]
 mod tests {
     use super::*;
-    use ir::Function;
     use ir::types;
+    use ir::Function;
     use std::string::ToString;
 
     #[test]

lib/codegen/src/isa/arm32/mod.rs

@@ -9,8 +9,8 @@ pub mod settings;
 use super::super::settings as shared_settings;
 use binemit::{emit_function, CodeSink, MemoryCodeSink};
 use ir;
-use isa::Builder as IsaBuilder;
 use isa::enc_tables::{self as shared_enc_tables, lookup_enclist, Encodings};
+use isa::Builder as IsaBuilder;
 use isa::{EncInfo, RegClass, RegInfo, TargetIsa};
 use regalloc;
 use std::boxed::Box;

lib/codegen/src/isa/arm64/mod.rs

@@ -9,8 +9,8 @@ pub mod settings;
 use super::super::settings as shared_settings;
 use binemit::{emit_function, CodeSink, MemoryCodeSink};
 use ir;
-use isa::Builder as IsaBuilder;
 use isa::enc_tables::{lookup_enclist, Encodings};
+use isa::Builder as IsaBuilder;
 use isa::{EncInfo, RegClass, RegInfo, TargetIsa};
 use regalloc;
 use std::boxed::Box;

lib/codegen/src/isa/riscv/mod.rs

@@ -9,8 +9,8 @@ pub mod settings;
 use super::super::settings as shared_settings;
 use binemit::{emit_function, CodeSink, MemoryCodeSink};
 use ir;
-use isa::Builder as IsaBuilder;
 use isa::enc_tables::{self as shared_enc_tables, lookup_enclist, Encodings};
+use isa::Builder as IsaBuilder;
 use isa::{EncInfo, RegClass, RegInfo, TargetIsa};
 use regalloc;
 use std::boxed::Box;
@@ -113,8 +113,8 @@ impl TargetIsa for Isa {
 
 #[cfg(test)]
 mod tests {
-    use ir::{Function, InstructionData, Opcode};
     use ir::{immediates, types};
+    use ir::{Function, InstructionData, Opcode};
     use isa;
     use settings::{self, Configurable};
     use std::string::{String, ToString};

lib/codegen/src/isa/stack.rs

@@ -4,8 +4,8 @@
 //! defined in this module expresses the low-level details of accessing a stack slot from an
 //! encoded instruction.
 
-use ir::StackSlot;
 use ir::stackslot::{StackOffset, StackSlotKind, StackSlots};
+use ir::StackSlot;
 
 /// A method for referencing a stack slot in the current stack frame.
 ///

lib/codegen/src/isa/x86/mod.rs

@@ -9,8 +9,8 @@ pub mod settings;
 use super::super::settings as shared_settings;
 use binemit::{emit_function, CodeSink, MemoryCodeSink};
 use ir;
-use isa::Builder as IsaBuilder;
 use isa::enc_tables::{self as shared_enc_tables, lookup_enclist, Encodings};
+use isa::Builder as IsaBuilder;
 use isa::{EncInfo, RegClass, RegInfo, TargetIsa};
 use regalloc;
 use result;

lib/codegen/src/lib.rs

@@ -31,9 +31,13 @@
                 redundant_field_names,
                 useless_let_if_seq,
                 len_without_is_empty))]
-#![cfg_attr(feature = "cargo-clippy",
-            warn(float_arithmetic, mut_mut, nonminimal_bool, option_map_unwrap_or,
-                 option_map_unwrap_or_else, print_stdout, unicode_not_nfc, use_self))]
+#![cfg_attr(
+    feature = "cargo-clippy",
+    warn(
+        float_arithmetic, mut_mut, nonminimal_bool, option_map_unwrap_or, option_map_unwrap_or_else,
+        print_stdout, unicode_not_nfc, use_self
+    )
+)]
 // Turns on no_std and alloc features if std is not available.
 #![cfg_attr(not(feature = "std"), no_std)]
 #![cfg_attr(not(feature = "std"), feature(alloc))]

lib/codegen/src/preopt.rs

@@ -3,12 +3,12 @@
 #![allow(non_snake_case)]
 
 use cursor::{Cursor, FuncCursor};
-use divconst_magic_numbers::{MS32, MS64, MU32, MU64};
 use divconst_magic_numbers::{magicS32, magicS64, magicU32, magicU64};
-use ir::Inst;
+use divconst_magic_numbers::{MS32, MS64, MU32, MU64};
 use ir::dfg::ValueDef;
 use ir::instructions::Opcode;
 use ir::types::{I32, I64};
+use ir::Inst;
 use ir::{DataFlowGraph, Function, InstBuilder, InstructionData, Type, Value};
 use timing;
 

lib/codegen/src/regalloc/coloring.rs

@@ -46,16 +46,16 @@ use cursor::{Cursor, EncCursor};
 use dominator_tree::DominatorTree;
 use ir::{AbiParam, ArgumentLoc, InstBuilder, ValueDef};
 use ir::{Ebb, Function, Inst, Layout, SigRef, Value, ValueLoc};
-use isa::{ConstraintKind, EncInfo, OperandConstraint, RecipeConstraints, TargetIsa};
 use isa::{regs_overlap, RegClass, RegInfo, RegUnit};
+use isa::{ConstraintKind, EncInfo, OperandConstraint, RecipeConstraints, TargetIsa};
 use packed_option::PackedOption;
-use regalloc::RegDiversions;
 use regalloc::affinity::Affinity;
 use regalloc::live_value_tracker::{LiveValue, LiveValueTracker};
 use regalloc::liveness::Liveness;
 use regalloc::liverange::{LiveRange, LiveRangeContext};
 use regalloc::register_set::RegisterSet;
 use regalloc::solver::{Solver, SolverError};
+use regalloc::RegDiversions;
 use std::mem;
 use timing;
 

lib/codegen/src/regalloc/solver.rs

@@ -1367,7 +1367,7 @@ mod tests {
                 mov(v15, gpr, r5, r3),
                 mov(v14, gpr, r4, r5),
                 mov(v13, gpr, r1, r4),
-                fill(v10, gpr, 0, r1) // Finally complete cycle 1.
+                fill(v10, gpr, 0, r1), // Finally complete cycle 1.
             ]
         );
     }

lib/codegen/src/stack_layout.rs

@@ -1,7 +1,7 @@
 //! Computing stack layout.
 
-use ir::StackSlots;
 use ir::stackslot::{StackOffset, StackSize, StackSlotKind};
+use ir::StackSlots;
 use result::CtonError;
 use std::cmp::{max, min};
 

lib/codegen/src/verifier/locations.rs

@@ -2,8 +2,8 @@
 
 use ir;
 use isa;
-use regalloc::RegDiversions;
 use regalloc::liveness::Liveness;
+use regalloc::RegDiversions;
 use timing;
 use verifier::Result;
 

lib/codegen/src/verifier/mod.rs

@@ -1147,8 +1147,8 @@ impl<'a> Verifier<'a> {
 mod tests {
     use super::{Error, Verifier};
     use entity::EntityList;
-    use ir::Function;
     use ir::instructions::{InstructionData, Opcode};
+    use ir::Function;
     use settings;
 
     macro_rules! assert_err_with_msg {