cranelift: Translate stack_* accesses as unaligned (#6016)
We can't currently ensure that these will be aligned, so we shouldn't mark them as such.
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@@ -82,8 +82,10 @@ pub fn simple_legalize(func: &mut ir::Function, cfg: &mut ControlFlowGraph, isa:
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let addr = pos.ins().stack_addr(addr_ty, stack_slot, offset);
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// Stack slots are required to be accessible and aligned.
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let mflags = MemFlags::trusted();
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// Stack slots are required to be accessible.
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// We can't currently ensure that they are aligned.
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let mut mflags = MemFlags::new();
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mflags.set_notrap();
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pos.func.dfg.replace(inst).load(ty, mflags, addr, 0);
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}
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InstructionData::StackStore {
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@@ -99,10 +101,10 @@ pub fn simple_legalize(func: &mut ir::Function, cfg: &mut ControlFlowGraph, isa:
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let addr = pos.ins().stack_addr(addr_ty, stack_slot, offset);
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// Stack slots are required to be accessible.
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// We can't currently ensure that they are aligned.
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let mut mflags = MemFlags::new();
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// Stack slots are required to be accessible and aligned.
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mflags.set_notrap();
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mflags.set_aligned();
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pos.func.dfg.replace(inst).store(mflags, arg, addr, 0);
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}
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InstructionData::DynamicStackLoad {
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@@ -16,6 +16,6 @@ block0(v0: i64):
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; nextln: ss0 = explicit_slot 8
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; check: block0(v0: i64):
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; nextln: v2 = stack_addr.i64 ss0
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; nextln: store notrap aligned v0, v2
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; nextln: store notrap v0, v2
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; nextln: return v0
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; nextln: }
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@@ -100,3 +100,19 @@ block0(v0: f64x2):
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return v4
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}
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; run: %extractlane_f64x2_through_stack([0x1.0 0x2.0]) == 0x1.0
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function %unaligned_extractlane() -> f64 {
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ss0 = explicit_slot 24
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block0:
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v0 = iconst.i64 0
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stack_store.i64 v0, ss0+0
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stack_store.i64 v0, ss0+8
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stack_store.i64 v0, ss0+16
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v1 = stack_load.f64x2 ss0+1
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v2 = extractlane v1, 1
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return v2
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}
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; run: %unaligned_extractlane() == 0.0
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