Add compile_function method to TargetIsa

cranelift/codegen/src/context.rs

@@ -167,8 +167,7 @@ impl Context {
 
         self.remove_constant_phis(isa)?;
 
-        let backend = isa.get_mach_backend();
-        let result = backend.compile_function(&self.func, self.want_disasm)?;
+        let result = isa.compile_function(&self.func, self.want_disasm)?;
         let info = result.code_info();
         self.mach_compile_result = Some(result);
         Ok(info)

cranelift/codegen/src/isa/mod.rs

@@ -46,12 +46,13 @@
 pub use crate::isa::call_conv::CallConv;
 
 use crate::flowgraph;
-use crate::ir;
+use crate::ir::{self, Function};
 #[cfg(feature = "unwind")]
 use crate::isa::unwind::systemv::RegisterMappingError;
-use crate::machinst::{MachBackend, UnwindInfoKind};
+use crate::machinst::{MachBackend, MachCompileResult, UnwindInfoKind};
 use crate::settings;
 use crate::settings::SetResult;
+use crate::CodegenResult;
 use alloc::{boxed::Box, vec::Vec};
 use core::fmt;
 use core::fmt::{Debug, Formatter};
@@ -227,6 +228,13 @@ pub trait TargetIsa: fmt::Display + Send + Sync {
     /// Get the ISA-dependent flag values that were used to make this trait object.
     fn isa_flags(&self) -> Vec<settings::Value>;
 
+    /// Compile the given function.
+    fn compile_function(
+        &self,
+        func: &Function,
+        want_disasm: bool,
+    ) -> CodegenResult<MachCompileResult>;
+
     #[cfg(feature = "unwind")]
     /// Map a regalloc::Reg to its corresponding DWARF register.
     fn map_regalloc_reg_to_dwarf(&self, _: ::regalloc::Reg) -> Result<u16, RegisterMappingError> {

cranelift/codegen/src/machinst/adapter.rs

@@ -52,6 +52,14 @@ impl TargetIsa for TargetIsaAdapter {
         self.backend.isa_flags()
     }
 
+    fn compile_function(
+        &self,
+        func: &Function,
+        want_disasm: bool,
+    ) -> CodegenResult<MachCompileResult> {
+        self.backend.compile_function(func, want_disasm)
+    }
+
     fn get_mach_backend(&self) -> &dyn MachBackend {
         &*self.backend
     }