Remove the old x86 backend
This commit is contained in:
bjorn3
@@ -1,68 +0,0 @@
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test compile
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target x86_64 legacy haswell
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;; `b1` return values need to be legalized into bytes so that they can be stored
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;; in memory.
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function %return_4_b1s(b1, b1, b1, b1) -> b1, b1, b1, b1 {
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;; check: function %return_4_b1s(b1 [%rsi], b1 [%rdx], b1 [%rcx], b1 [%r8], i64 sret [%rdi], i64 fp [%rbp]) -> i64 sret [%rax], i64 fp [%rbp] fast {
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block0(v0: b1, v1: b1, v2: b1, v3: b1):
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; check: block0(v0: b1 [%rsi], v1: b1 [%rdx], v2: b1 [%rcx], v3: b1 [%r8], v4: i64 [%rdi], v13: i64 [%rbp]):
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return v0, v1, v2, v3
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; check: v5 = bint.i8 v0
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; nextln: v9 = uextend.i32 v5
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; nextln: istore8 notrap aligned v9, v4
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; nextln: v6 = bint.i8 v1
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; nextln: v10 = uextend.i32 v6
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; nextln: istore8 notrap aligned v10, v4+1
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; nextln: v7 = bint.i8 v2
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; nextln: v11 = uextend.i32 v7
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; nextln: istore8 notrap aligned v11, v4+2
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; nextln: v8 = bint.i8 v3
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; nextln: v12 = uextend.i32 v8
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; nextln: istore8 notrap aligned v12, v4+3
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}
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function %call_4_b1s() {
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; check: function %call_4_b1s(i64 fp [%rbp], i64 csr [%rbx]) -> i64 fp [%rbp], i64 csr [%rbx] fast {
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; nextln: ss0 = sret_slot 4, offset -28
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fn0 = colocated %return_4_b1s(b1, b1, b1, b1) -> b1, b1, b1, b1
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; check: sig0 = (b1 [%rsi], b1 [%rdx], b1 [%rcx], b1 [%r8], i64 sret [%rdi]) -> i64 sret [%rax] fast
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block0:
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; check: block0(v26: i64 [%rbp], v27: i64 [%rbx]):
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v0 = bconst.b1 true
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v1 = bconst.b1 false
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v2 = bconst.b1 true
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v3 = bconst.b1 false
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; check: v8 = stack_addr.i64 ss0
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v4, v5, v6, v7 = call fn0(v0, v1, v2, v3)
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; check: v9 = call fn0(v0, v1, v2, v3, v8)
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; nextln: v22 = uload8.i32 notrap aligned v9
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; nextln: v10 = ireduce.i8 v22
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; nextln: v11 = raw_bitcast.b8 v10
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; nextln: v12 = breduce.b1 v11
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; nextln: v4 -> v12
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; nextln: v23 = uload8.i32 notrap aligned v9+1
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; nextln: v13 = ireduce.i8 v23
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; nextln: v14 = raw_bitcast.b8 v13
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; nextln: v15 = breduce.b1 v14
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; nextln: v5 -> v15
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; nextln: v24 = uload8.i32 notrap aligned v9+2
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; nextln: v16 = ireduce.i8 v24
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; nextln: v17 = raw_bitcast.b8 v16
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; nextln: v18 = breduce.b1 v17
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; nextln: v6 -> v18
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; nextln: v25 = uload8.i32 notrap aligned v9+3
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; nextln: v19 = ireduce.i8 v25
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; nextln: v20 = raw_bitcast.b8 v19
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; nextln: v21 = breduce.b1 v20
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; nextln: v7 -> v21
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return
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}
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@@ -1,26 +0,0 @@
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test legalizer
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target x86_64 legacy haswell
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;; Indirect calls with many returns.
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function %call_indirect_many_rets(i64) {
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; check: ss0 = sret_slot 32
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sig0 = () -> i64, i64, i64, i64
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; check: sig0 = (i64 sret [%rdi]) -> i64 sret [%rax] fast
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block0(v0: i64):
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v1, v2, v3, v4 = call_indirect sig0, v0()
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; check: v5 = stack_addr.i64 ss0
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; nextln: v6 = call_indirect sig0, v0(v5)
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; nextln: v7 = load.i64 notrap aligned v6
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; nextln: v1 -> v7
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; nextln: v8 = load.i64 notrap aligned v6+8
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; nextln: v2 -> v8
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; nextln: v9 = load.i64 notrap aligned v6+16
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; nextln: v3 -> v9
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; nextln: v10 = load.i64 notrap aligned v6+24
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; nextln: v4 -> v10
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return
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}
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@@ -1,24 +0,0 @@
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test legalizer
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target x86_64 legacy haswell
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;; Test if arguments are legalized if function uses sret
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function %call_indirect_with_split_arg(i64, i64, i64) {
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; check: ss0 = sret_slot 32
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sig0 = (i128) -> i64, i64, i64, i64
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; check: sig0 = (i64 [%rsi], i64 [%rdx], i64 sret [%rdi]) -> i64 sret [%rax] fast
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block0(v0: i64, v1: i64, v2: i64):
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v3 = iconcat v1, v2
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v4, v5, v6, v7 = call_indirect sig0, v0(v3)
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; check: v8 = stack_addr.i64 ss0
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; check: v9 = call_indirect sig0, v0(v1, v2, v8)
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; check: v10 = load.i64 notrap aligned v9
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; check: v4 -> v10
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; check: v11 = load.i64 notrap aligned v9+8
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; check: v5 -> v11
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; check: v12 = load.i64 notrap aligned v9+16
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; check: v6 -> v12
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; check: v13 = load.i64 notrap aligned v9+24
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; check: v7 -> v13
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return
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}
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@@ -1,61 +0,0 @@
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test legalizer
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target x86_64 legacy haswell
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;; Test that we don't reuse `sret` stack slots for multiple calls. We could do
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;; this one day, but it would require some care to ensure that we don't have
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;; subsequent calls overwrite the results of previous calls.
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function %foo() -> i32, f32 {
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; check: ss0 = sret_slot 20
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; nextln: ss1 = sret_slot 20
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fn0 = %f() -> i32, i32, i32, i32, i32
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fn1 = %g() -> f32, f32, f32, f32, f32
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; check: sig0 = (i64 sret [%rdi]) -> i64 sret [%rax] fast
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; nextln: sig1 = (i64 sret [%rdi]) -> i64 sret [%rax] fast
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; nextln: fn0 = %f sig0
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; nextln: fn1 = %g sig1
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block0:
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v0, v1, v2, v3, v4 = call fn0()
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; check: v18 = stack_addr.i64 ss0
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; nextln: v25 = func_addr.i64 fn0
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; nextln: v19 = call_indirect sig0, v25(v18)
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; nextln: v20 = load.i32 notrap aligned v19
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; nextln: v0 -> v20
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; nextln: v21 = load.i32 notrap aligned v19+4
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; nextln: v1 -> v21
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; nextln: v22 = load.i32 notrap aligned v19+8
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; nextln: v2 -> v22
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; nextln: v23 = load.i32 notrap aligned v19+12
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; nextln: v3 -> v23
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; nextln: v24 = load.i32 notrap aligned v19+16
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; nextln: v4 -> v24
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v5, v6, v7, v8, v9 = call fn1()
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; check: v26 = stack_addr.i64 ss1
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; nextln: v33 = func_addr.i64 fn1
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; nextln: v27 = call_indirect sig1, v33(v26)
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; nextln: v28 = load.f32 notrap aligned v27
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; nextln: v5 -> v28
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; nextln: v29 = load.f32 notrap aligned v27+4
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; nextln: v6 -> v29
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; nextln: v30 = load.f32 notrap aligned v27+8
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; nextln: v7 -> v30
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; nextln: v31 = load.f32 notrap aligned v27+12
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; nextln: v8 -> v31
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; nextln: v32 = load.f32 notrap aligned v27+16
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; nextln: v9 -> v32
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v10 = iadd v0, v1
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v11 = iadd v2, v3
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v12 = iadd v10, v11
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v13 = iadd v12, v4
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v14 = fadd v5, v6
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v15 = fadd v7, v8
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v16 = fadd v14, v15
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v17 = fadd v16, v9
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return v13, v17
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}
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@@ -1,51 +0,0 @@
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test legalizer
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target x86_64 legacy haswell
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;; Need to insert padding after the `i8`s so that the `i32` and `i64` are
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;; aligned.
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function %returner() -> i8, i32, i8, i64 {
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; check: function %returner(i64 sret [%rdi]) -> i64 sret [%rax] fast {
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block0:
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; check: block0(v4: i64):
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v0 = iconst.i8 0
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v1 = iconst.i32 1
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v2 = iconst.i8 2
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v3 = iconst.i64 3
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return v0, v1, v2, v3
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; check: v6 = uextend.i32 v0
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; nextln: istore8 notrap aligned v6, v4
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; nextln: store notrap aligned v1, v4+4
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; nextln: v7 = uextend.i32 v2
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; nextln: istore8 notrap aligned v7, v4+8
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; nextln: store notrap aligned v3, v4+16
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; nextln: return v4
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}
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function %caller() {
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; check: ss0 = sret_slot 24
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fn0 = %returner() -> i8, i32, i8, i64
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; check: sig0 = (i64 sret [%rdi]) -> i64 sret [%rax] fast
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; nextln: fn0 = %returner sig0
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block0:
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v0, v1, v2, v3 = call fn0()
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; check: v4 = stack_addr.i64 ss0
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; nextln: v10 = func_addr.i64 fn0
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; nextln: v5 = call_indirect sig0, v10(v4)
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; nextln: v11 = uload8.i32 notrap aligned v5
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; nextln: v6 = ireduce.i8 v11
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; nextln: v0 -> v6
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; nextln: v7 = load.i32 notrap aligned v5+4
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; nextln: v1 -> v7
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; nextln: v12 = uload8.i32 notrap aligned v5+8
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; nextln: v8 = ireduce.i8 v12
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; nextln: v2 -> v8
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; nextln: v9 = load.i64 notrap aligned v5+16
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; nextln: v3 -> v9
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return
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}
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