Remove the old x86 backend

cranelift/filetests/filetests/isa/x64/amode-opt.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst
+target x86_64
 
 function %amode_add(i64, i64) -> i64 {
 block0(v0: i64, v1: i64):

cranelift/filetests/filetests/isa/x64/b1.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst
+target x86_64
 
 function %f0(b1, i32, i32) -> i32 {
 ; check:  pushq   %rbp

cranelift/filetests/filetests/isa/x64/basic.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst
+target x86_64
 
 function %f(i32, i32) -> i32 {
 block0(v0: i32, v1: i32):

cranelift/filetests/filetests/isa/x64/branches.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst
+target x86_64
 
 function %f0(i32, i32) -> i32 {
 block0(v0: i32, v1: i32):

cranelift/filetests/filetests/isa/x64/call-conv.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst
+target x86_64
 
 ;; system_v has first param in %rdi, fascall in %rcx
 function %one_arg(i32) system_v {

cranelift/filetests/filetests/isa/x64/clz-lzcnt.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst has_lzcnt
+target x86_64 has_lzcnt
 
 function %clz(i64) -> i64 {
 block0(v0: i64):

cranelift/filetests/filetests/isa/x64/cmp-mem-bug.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst
+target x86_64
 
 function %f0(i64, i64) -> i64, i64 {
 block0(v0: i64, v1: i64):

cranelift/filetests/filetests/isa/x64/ctz-bmi1.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst has_bmi1
+target x86_64 has_bmi1
 
 function %ctz(i64) -> i64 {
 block0(v0: i64):

cranelift/filetests/filetests/isa/x64/div-checks.clif

@@ -1,6 +1,6 @@
 test compile
 set avoid_div_traps=false
-target x86_64 machinst
+target x86_64
 
 ;; We should get the checked-div/rem sequence (`srem` pseudoinst below) even
 ;; when `avoid_div_traps` above is false (i.e. even when the host is normally

cranelift/filetests/filetests/isa/x64/fastcall.clif

@@ -1,7 +1,7 @@
 test compile
 set enable_llvm_abi_extensions=true
 set unwind_info=true
-target x86_64 machinst
+target x86_64
 
 function %f0(i64, i64, i64, i64) -> i64 windows_fastcall {
 block0(v0: i64, v1: i64, v2: i64, v3: i64):
@@ -206,7 +206,7 @@ block0(v0: i64):
   v18 = load.f64 v0+136
   v19 = load.f64 v0+144
   v20 = load.f64 v0+152
-  
+
   v21 = fadd.f64 v1, v2
   v22 = fadd.f64 v3, v4
   v23 = fadd.f64 v5, v6

cranelift/filetests/filetests/isa/x64/floating-point.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst
+target x86_64
 
 function %f(f64) -> f64 {
 block0(v0: f64):

cranelift/filetests/filetests/isa/x64/heap.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst
+target x86_64
 
 function %f(i32, i64 vmctx) -> i64 {
     gv0 = vmctx

cranelift/filetests/filetests/isa/x64/i128.clif

@@ -1,6 +1,6 @@
 test compile
 set enable_llvm_abi_extensions=true
-target x86_64 machinst
+target x86_64
 
 function %f0(i128, i128) -> i128 {
 ; check:   pushq   %rbp
@@ -190,7 +190,7 @@ block0(v0: i128, v1: i128):
 ; nextln: orq     %rax, %r8
 ; nextln: andq    $$1, %r8
 ; nextln: setnz   %r8b
- 
+
     v4 = icmp slt v0, v1
 ; check:  cmpq    %rcx, %rsi
 ; nextln: setl    %r9b
@@ -201,7 +201,7 @@ block0(v0: i128, v1: i128):
 ; nextln: orq     %r9, %r10
 ; nextln: andq    $$1, %r10
 ; nextln: setnz   %r9b
- 
+
     v5 = icmp sle v0, v1
 ; check:  cmpq    %rcx, %rsi
 ; nextln: setl    %r10b
@@ -212,7 +212,7 @@ block0(v0: i128, v1: i128):
 ; nextln: orq     %r10, %r11
 ; nextln: andq    $$1, %r11
 ; nextln: setnz   %r10b
- 
+
     v6 = icmp sgt v0, v1
 ; check:  cmpq    %rcx, %rsi
 ; nextln: setnle  %r11b
@@ -307,7 +307,7 @@ block0(v0: i128):
 ; nextln: setz    %sil
 ; nextln: andb    %dil, %sil
 ; nextln: jnz     label1; j label2
- 
+
     jump block2
 
 block1:
@@ -725,7 +725,7 @@ block2(v6: i128):
 ; nextln: movq    %rbp, %rsp
 ; nextln: popq    %rbp
 ; nextln: ret
- 
+
 }
 
 function %f24(i128, i128, i64, i128, i128, i128) -> i128 {
@@ -1106,4 +1106,4 @@ block0(v0: i128, v1: i128):
 ; nextln: movq    %rcx, %rdx
 ; nextln: movq    %rbp, %rsp
 ; nextln: popq    %rbp
-; nextln: ret
+; nextln: ret

cranelift/filetests/filetests/isa/x64/load-op.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst
+target x86_64
 
 function %add_from_mem_u32_1(i64, i32) -> i32 {
 block0(v0: i64, v1: i32):

cranelift/filetests/filetests/isa/x64/move-elision.clif

@@ -1,6 +1,6 @@
 test compile
 set enable_simd
-target x86_64 machinst skylake
+target x86_64 skylake
 
 function %move_registers(i32x4) -> b8x16 {
 block0(v0: i32x4):

cranelift/filetests/filetests/isa/x64/popcnt-use-popcnt.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst has_popcnt has_sse42
+target x86_64 has_popcnt has_sse42
 
 function %popcnt(i64) -> i64 {
 block0(v0: i64):

cranelift/filetests/filetests/isa/x64/popcnt.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst
+target x86_64
 
 function %popcnt64(i64) -> i64 {
 block0(v0: i64):

cranelift/filetests/filetests/isa/x64/probestack.clif

@@ -1,6 +1,6 @@
 test compile
 set enable_probestack=true
-target x86_64 machinst
+target x86_64
 
 function %f1() -> i64 {
 ss0 = explicit_slot 100000

cranelift/filetests/filetests/isa/x64/select-i128.clif

@@ -1,6 +1,6 @@
 test compile
 set enable_llvm_abi_extensions=true
-target x86_64 machinst
+target x86_64
 
 function %f0(i32, i128, i128) -> i128 {
 ; check:   pushq   %rbp
@@ -24,6 +24,6 @@ block0(v0: i32, v1: i128, v2: i128):
 ; nextln: movq    %rbp, %rsp
 ; nextln: popq    %rbp
 ; nextln: ret
- 
+
 }
 

cranelift/filetests/filetests/isa/x64/simd-bitwise-compile.clif

@@ -1,6 +1,6 @@
 test compile
 set enable_simd
-target x86_64 machinst skylake
+target x86_64 skylake
 
 function %bitselect_i16x8() -> i16x8 {
 block0:

cranelift/filetests/filetests/isa/x64/simd-comparison-legalize.clif

@@ -1,6 +1,6 @@
 test compile
 set enable_simd
-target x86_64 machinst skylake
+target x86_64 skylake
 
 function %icmp_ne_32x4(i32x4, i32x4) -> b32x4 {
 block0(v0: i32x4, v1: i32x4):

cranelift/filetests/filetests/isa/x64/simd-lane-access-compile.clif

@@ -1,6 +1,6 @@
 test compile
 set enable_simd
-target x86_64 machinst has_ssse3 has_sse41
+target x86_64 has_ssse3 has_sse41
 
 ;; shuffle
 

cranelift/filetests/filetests/isa/x64/simd-logical-compile.clif

@@ -1,6 +1,6 @@
 test compile
 set enable_simd
-target x86_64 machinst skylake
+target x86_64 skylake
 
 function %bnot_b32x4(b32x4) -> b32x4 {
 block0(v0: b32x4):

cranelift/filetests/filetests/isa/x64/store-stack-full-width-i32.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst
+target x86_64
 
 ;; The goal of this test is to ensure that stack spills of an integer value,
 ;; which width is less than the machine word's size, cause the full word to be

cranelift/filetests/filetests/isa/x64/struct-arg.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst
+target x86_64
 
 function u0:0(i64 sarg(64)) -> i8 system_v {
 block0(v0: i64):

cranelift/filetests/filetests/isa/x64/struct-ret.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst
+target x86_64
 
 function %f0(i64 sret) {
 block0(v0: i64):

cranelift/filetests/filetests/isa/x64/tls_elf.clif

@@ -1,6 +1,6 @@
 test compile
 set tls_model=elf_gd
-target x86_64 machinst
+target x86_64
 
 function u0:0(i32) -> i64 {
 gv0 = symbol colocated tls u1:0

cranelift/filetests/filetests/isa/x64/uextend-elision.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst
+target x86_64
 
 function %elide_uextend_add(i32, i32) -> i64 {
 block0(v0: i32, v1: i32):

cranelift/filetests/filetests/isa/x64/unused_jt_unreachable_block.clif

@@ -1,5 +1,5 @@
 test compile
-target x86_64 machinst
+target x86_64
 
 ;; From: https://github.com/bytecodealliance/wasmtime/issues/2670